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[X86] Remove unnecessary CVT instrw overrides.

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llvm-svn: 330552
This commit is contained in:
Simon Pilgrim 2018-04-22 17:54:58 +00:00
parent e85d8ff3b7
commit b2e5ced9b1
3 changed files with 0 additions and 13 deletions
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3
lib/Target/X86/X86SchedBroadwell.td
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@ -1426,8 +1426,6 @@ def: InstRW<[BWWriteResGroup91], (instregex "MMX_CVTPI2PSirm",
"(V?)ADDSUBPDrm", "(V?)ADDSUBPDrm",
"(V?)ADDSUBPSrm", "(V?)ADDSUBPSrm",
"(V?)CVTDQ2PSrm", "(V?)CVTDQ2PSrm",
"(V?)CVTPS2DQrm",
"(V?)CVTTPS2DQrm",
"(V?)SUBPDrm", "(V?)SUBPDrm",
"(V?)SUBPSrm", "(V?)SUBPSrm",
"(V?)SUBSDrm", "(V?)SUBSDrm",
@ -1551,7 +1549,6 @@ def: InstRW<[BWWriteResGroup101], (instregex "ADD_F32m",
"VADDSUBPSYrm", "VADDSUBPSYrm",
"VCMPPDYrmi", "VCMPPDYrmi",
"VCMPPSYrmi", "VCMPPSYrmi",
"VCVTDQ2PSYrm",
"VCVTPS2DQYrm", "VCVTPS2DQYrm",
"VCVTTPS2DQYrm", "VCVTTPS2DQYrm",
"VMAX(C?)PDYrm", "VMAX(C?)PDYrm",

1
lib/Target/X86/X86SchedHaswell.td
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@ -1493,7 +1493,6 @@ def: InstRW<[HWWriteResGroup52], (instregex "(V?)ADDPDrm",
"(V?)ADDPSrm", "(V?)ADDPSrm",
"(V?)ADDSUBPDrm", "(V?)ADDSUBPDrm",
"(V?)ADDSUBPSrm", "(V?)ADDSUBPSrm",
"(V?)CVTDQ2PSrm",
"(V?)CVTPS2DQrm", "(V?)CVTPS2DQrm",
"(V?)CVTTPS2DQrm", "(V?)CVTTPS2DQrm",
"(V?)SUBPDrm", "(V?)SUBPDrm",

9
lib/Target/X86/X86ScheduleZnver1.td
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@ -1247,12 +1247,6 @@ def ZnWriteCVTPD2PSLd: SchedWriteRes<[ZnAGU,ZnFPU03]> {
// x,m128. // x,m128.
def : InstRW<[ZnWriteCVTPD2PSLd], (instregex "(V?)CVTPD2PS(X?)rm")>; def : InstRW<[ZnWriteCVTPD2PSLd], (instregex "(V?)CVTPD2PS(X?)rm")>;
// x,y.
def ZnWriteCVTPD2PSYr : SchedWriteRes<[ZnFPU3]> {
let Latency = 5;
}
def : InstRW<[ZnWriteCVTPD2PSYr], (instregex "(V?)CVTPD2PSYrr")>;
// x,m256. // x,m256.
def ZnWriteCVTPD2PSYLd : SchedWriteRes<[ZnAGU, ZnFPU3]> { def ZnWriteCVTPD2PSYLd : SchedWriteRes<[ZnAGU, ZnFPU3]> {
let Latency = 11; let Latency = 11;
@ -1351,9 +1345,6 @@ def : InstRW<[ZnWriteCVTPS2PIr], (instregex "MMX_CVT(T?)PD2PIirr")>;
def ZnWriteCVSTSI2SSr: SchedWriteRes<[ZnFPU3]> { def ZnWriteCVSTSI2SSr: SchedWriteRes<[ZnFPU3]> {
let Latency = 5; let Latency = 5;
} }
// CVSTSI2SS.
// x,r32.
def : InstRW<[ZnWriteCVSTSI2SSr], (instregex "(V?)CVTSI2SS(64)?rr")>;
// same as CVTPD2DQr // same as CVTPD2DQr
// CVT(T)SS2SI. // CVT(T)SS2SI.