mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
* Tabs to spaces
* Remove unnecessary parens, braces, clean up code layout llvm-svn: 14379
This commit is contained in:
parent
2faa0989d0
commit
b312aa9f4b
@ -74,7 +74,7 @@ namespace {
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO,
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bool elideOffsetKeyword = false);
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bool elideOffsetKeyword = false);
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void printConstantPool(MachineConstantPool *MCP);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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@ -283,32 +283,36 @@ void Printer::emitGlobalConstant(const Constant *CV) {
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double FVal;
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uint64_t UVal;
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struct {
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uint32_t MSWord;
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uint32_t LSWord;
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uint32_t MSWord;
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uint32_t LSWord;
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} T;
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} U;
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U.FVal = Val;
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O << ".long\t" << U.T.MSWord << "\t# double most significant word " << Val << "\n";
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O << ".long\t" << U.T.LSWord << "\t# double least significant word" << Val << "\n";
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O << ".long\t" << U.T.MSWord << "\t# double most significant word "
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<< Val << "\n";
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O << ".long\t" << U.T.LSWord << "\t# double least significant word"
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<< Val << "\n";
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return;
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}
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}
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} else if (CV->getType()->getPrimitiveSize() == 64) {
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const ConstantInt *CI = dyn_cast<ConstantInt>(CV);
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if(CI) {
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union DU { // Abide by C TBAA rules
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union DU { // Abide by C TBAA rules
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int64_t UVal;
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struct {
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uint32_t MSWord;
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uint32_t LSWord;
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uint32_t MSWord;
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uint32_t LSWord;
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} T;
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} U;
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U.UVal = CI->getRawValue();
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O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word " << U.UVal << "\n";
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O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word" << U.UVal << "\n";
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return;
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O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word "
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<< U.UVal << "\n";
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O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word"
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<< U.UVal << "\n";
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return;
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}
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}
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@ -327,7 +331,7 @@ void Printer::emitGlobalConstant(const Constant *CV) {
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O << ".long";
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break;
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case Type::ULongTyID: case Type::LongTyID:
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assert (0 && "Should have already output double-word constant.");
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assert (0 && "Should have already output double-word constant.");
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case Type::FloatTyID: case Type::DoubleTyID:
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assert (0 && "Should have already output floating point constant.");
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default:
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@ -396,7 +400,7 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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O << "L" << NumberForBB[I->getBasicBlock()] << ":\t# "
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<< I->getBasicBlock()->getName() << "\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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@ -410,7 +414,7 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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void Printer::printOp(const MachineOperand &MO,
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bool elideOffsetKeyword /* = false */) {
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bool elideOffsetKeyword /* = false */) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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int new_symbol;
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@ -442,12 +446,12 @@ void Printer::printOp(const MachineOperand &MO,
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return;
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case MachineOperand::MO_GlobalAddress:
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if (!elideOffsetKeyword) {
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if(isa<Function>(MO.getGlobal())) {
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Stubs.insert(Mang->getValueName(MO.getGlobal()));
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O << "L" << Mang->getValueName(MO.getGlobal()) << "$stub";
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} else {
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O << Mang->getValueName(MO.getGlobal());
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}
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if(isa<Function>(MO.getGlobal())) {
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Stubs.insert(Mang->getValueName(MO.getGlobal()));
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O << "L" << Mang->getValueName(MO.getGlobal()) << "$stub";
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} else {
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O << Mang->getValueName(MO.getGlobal());
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}
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}
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return;
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case MachineOperand::MO_ExternalSymbol:
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@ -461,37 +465,37 @@ void Printer::printOp(const MachineOperand &MO,
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#if 0
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static inline
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unsigned int ValidOpcodes(const MachineInstr *MI, unsigned int ArgType[5]) {
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int i;
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unsigned int retval = 1;
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for(i = 0; i<5; i++) {
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switch(ArgType[i]) {
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case none:
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break;
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case Gpr:
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case Gpr0:
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Type::UIntTy
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case Simm16:
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case Zimm16:
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case PCRelimm24:
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case Imm24:
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case Imm5:
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case PCRelimm14:
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case Imm14:
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case Imm2:
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case Crf:
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case Imm3:
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case Imm1:
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case Fpr:
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case Imm4:
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case Imm8:
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case Disimm16:
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case Spr:
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case Sgr:
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};
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}
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}
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int i;
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unsigned int retval = 1;
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for(i = 0; i<5; i++) {
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switch(ArgType[i]) {
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case none:
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break;
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case Gpr:
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case Gpr0:
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Type::UIntTy
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case Simm16:
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case Zimm16:
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case PCRelimm24:
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case Imm24:
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case Imm5:
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case PCRelimm14:
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case Imm14:
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case Imm2:
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case Crf:
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case Imm3:
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case Imm1:
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case Fpr:
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case Imm4:
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case Imm8:
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case Disimm16:
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case Spr:
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case Sgr:
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};
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}
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}
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}
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#endif
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@ -507,19 +511,20 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
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unsigned int ArgType[5];
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ArgType[0] = (Desc.TSFlags>>PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
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ArgType[1] = (Desc.TSFlags>>PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
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ArgType[2] = (Desc.TSFlags>>PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
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ArgType[3] = (Desc.TSFlags>>PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
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ArgType[4] = (Desc.TSFlags>>PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
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assert ( ((Desc.TSFlags & PPC32II::VMX) == 0) && "Instruction requires VMX support");
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assert ( ((Desc.TSFlags & PPC32II::PPC64) == 0) && "Instruction requires 64 bit support");
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assert((Desc.TSFlags & PPC32II::VMX == 0) &&
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"Instruction requires VMX support");
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assert((Desc.TSFlags & PPC32II::PPC64 == 0) &&
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"Instruction requires 64 bit support");
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//assert ( ValidOpcodes(MI, ArgType) && "Instruction has invalid inputs");
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++EmittedInsts;
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if(Opcode == PPC32::MovePCtoLR) {
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if (Opcode == PPC32::MovePCtoLR) {
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O << "mflr r0\n";
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O << "bcl 20,31,L" << CurrentFnName << "$pb\n";
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O << "L" << CurrentFnName << "$pb:\n";
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@ -530,7 +535,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects "
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<< ArgCount << " args\n");
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if(Opcode == PPC32::LOADLoAddr) {
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if (Opcode == PPC32::LOADLoAddr) {
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printOp(MI->getOperand(0));
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O << ", ";
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printOp(MI->getOperand(1));
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@ -540,7 +545,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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return;
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}
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if(Opcode == PPC32::LOADHiAddr) {
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if (Opcode == PPC32::LOADHiAddr) {
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printOp(MI->getOperand(0));
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O << ", ";
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printOp(MI->getOperand(1));
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@ -550,30 +555,29 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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return;
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}
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if( (ArgCount == 3) && (ArgType[1] == PPC32II::Disimm16) ) {
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if (ArgCount == 3 && ArgType[1] == PPC32II::Disimm16) {
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printOp(MI->getOperand(0));
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O << ", ";
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printOp(MI->getOperand(1));
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O << "(";
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if((ArgType[2] == PPC32II::Gpr0) && (MI->getOperand(2).getReg() == PPC32::R0)) {
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O << "0";
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} else {
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printOp(MI->getOperand(2));
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}
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if (ArgType[2] == PPC32II::Gpr0 && MI->getOperand(2).getReg() == PPC32::R0)
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O << "0";
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else
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printOp(MI->getOperand(2));
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O << ")\n";
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} else {
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for(i = 0; i< ArgCount; i++) {
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if( (ArgType[i] == PPC32II::Gpr0) && ((MI->getOperand(i).getReg()) == PPC32::R0)) {
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O << "0";
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} else {
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//std::cout << "DEBUG " << (*(TM.getRegisterInfo())).get(MI->getOperand(i).getReg()).Name << "\n";
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printOp(MI->getOperand(i));
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}
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if( ArgCount - 1 == i) {
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O << "\n";
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} else {
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O << ", ";
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}
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if (ArgType[i] == PPC32II::Gpr0 &&
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MI->getOperand(i).getReg() == PPC32::R0)
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O << "0";
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else {
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//std::cout << "DEBUG " << (*(TM.getRegisterInfo())).get(MI->getOperand(i).getReg()).Name << "\n";
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printOp(MI->getOperand(i));
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}
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if( ArgCount - 1 == i)
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O << "\n";
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else
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O << ", ";
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}
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}
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@ -666,28 +670,28 @@ bool Printer::doFinalization(Module &M) {
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}
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}
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for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i) {
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O << ".data\n";
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O << ".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
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O << "\t.align 2\n";
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O << "L" << *i << "$stub:\n";
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O << "\t.indirect_symbol " << *i << "\n";
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O << "\tmflr r0\n";
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O << "\tbcl 20,31,L0$" << *i << "\n";
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O << "L0$" << *i << ":\n";
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O << "\tmflr r11\n";
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O << "\taddis r11,r11,ha16(L" << *i << "$lazy_ptr-L0$" << *i << ")\n";
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O << "\tmtlr r0\n";
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O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
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O << "\tmtctr r12\n";
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O << "\tbctr\n";
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O << ".data\n";
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O << ".lazy_symbol_pointer\n";
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O << "L" << *i << "$lazy_ptr:\n";
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O << ".indirect_symbol " << *i << "\n";
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O << ".long dyld_stub_binding_helper\n";
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}
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for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i)
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{
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O << ".data\n";
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O<<".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
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O << "\t.align 2\n";
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O << "L" << *i << "$stub:\n";
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O << "\t.indirect_symbol " << *i << "\n";
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O << "\tmflr r0\n";
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O << "\tbcl 20,31,L0$" << *i << "\n";
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O << "L0$" << *i << ":\n";
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O << "\tmflr r11\n";
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O << "\taddis r11,r11,ha16(L" << *i << "$lazy_ptr-L0$" << *i << ")\n";
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O << "\tmtlr r0\n";
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O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
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O << "\tmtctr r12\n";
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O << "\tbctr\n";
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O << ".data\n";
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O << ".lazy_symbol_pointer\n";
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O << "L" << *i << "$lazy_ptr:\n";
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O << ".indirect_symbol " << *i << "\n";
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O << ".long dyld_stub_binding_helper\n";
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}
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delete Mang;
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return false; // success
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@ -74,7 +74,7 @@ namespace {
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO,
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bool elideOffsetKeyword = false);
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bool elideOffsetKeyword = false);
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void printConstantPool(MachineConstantPool *MCP);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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@ -283,32 +283,36 @@ void Printer::emitGlobalConstant(const Constant *CV) {
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double FVal;
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uint64_t UVal;
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struct {
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uint32_t MSWord;
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uint32_t LSWord;
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uint32_t MSWord;
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uint32_t LSWord;
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} T;
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} U;
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U.FVal = Val;
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O << ".long\t" << U.T.MSWord << "\t# double most significant word " << Val << "\n";
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O << ".long\t" << U.T.LSWord << "\t# double least significant word" << Val << "\n";
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O << ".long\t" << U.T.MSWord << "\t# double most significant word "
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<< Val << "\n";
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O << ".long\t" << U.T.LSWord << "\t# double least significant word"
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<< Val << "\n";
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return;
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}
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}
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} else if (CV->getType()->getPrimitiveSize() == 64) {
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const ConstantInt *CI = dyn_cast<ConstantInt>(CV);
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if(CI) {
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union DU { // Abide by C TBAA rules
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union DU { // Abide by C TBAA rules
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int64_t UVal;
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struct {
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uint32_t MSWord;
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uint32_t LSWord;
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uint32_t MSWord;
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uint32_t LSWord;
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} T;
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} U;
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U.UVal = CI->getRawValue();
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O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word " << U.UVal << "\n";
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O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word" << U.UVal << "\n";
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return;
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O << ".long\t" << U.T.MSWord << "\t# Double-word most significant word "
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<< U.UVal << "\n";
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O << ".long\t" << U.T.LSWord << "\t# Double-word least significant word"
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<< U.UVal << "\n";
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return;
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}
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}
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@ -327,7 +331,7 @@ void Printer::emitGlobalConstant(const Constant *CV) {
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O << ".long";
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break;
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case Type::ULongTyID: case Type::LongTyID:
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assert (0 && "Should have already output double-word constant.");
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assert (0 && "Should have already output double-word constant.");
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case Type::FloatTyID: case Type::DoubleTyID:
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assert (0 && "Should have already output floating point constant.");
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default:
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@ -396,7 +400,7 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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O << "L" << NumberForBB[I->getBasicBlock()] << ":\t# "
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<< I->getBasicBlock()->getName() << "\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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@ -410,7 +414,7 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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void Printer::printOp(const MachineOperand &MO,
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bool elideOffsetKeyword /* = false */) {
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bool elideOffsetKeyword /* = false */) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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int new_symbol;
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@ -442,12 +446,12 @@ void Printer::printOp(const MachineOperand &MO,
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return;
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case MachineOperand::MO_GlobalAddress:
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if (!elideOffsetKeyword) {
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if(isa<Function>(MO.getGlobal())) {
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Stubs.insert(Mang->getValueName(MO.getGlobal()));
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O << "L" << Mang->getValueName(MO.getGlobal()) << "$stub";
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} else {
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O << Mang->getValueName(MO.getGlobal());
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}
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if(isa<Function>(MO.getGlobal())) {
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Stubs.insert(Mang->getValueName(MO.getGlobal()));
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O << "L" << Mang->getValueName(MO.getGlobal()) << "$stub";
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} else {
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O << Mang->getValueName(MO.getGlobal());
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}
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}
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return;
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case MachineOperand::MO_ExternalSymbol:
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@ -461,37 +465,37 @@ void Printer::printOp(const MachineOperand &MO,
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#if 0
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static inline
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unsigned int ValidOpcodes(const MachineInstr *MI, unsigned int ArgType[5]) {
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int i;
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unsigned int retval = 1;
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for(i = 0; i<5; i++) {
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switch(ArgType[i]) {
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case none:
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break;
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case Gpr:
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case Gpr0:
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Type::UIntTy
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||||
case Simm16:
|
||||
case Zimm16:
|
||||
case PCRelimm24:
|
||||
case Imm24:
|
||||
case Imm5:
|
||||
case PCRelimm14:
|
||||
case Imm14:
|
||||
case Imm2:
|
||||
case Crf:
|
||||
case Imm3:
|
||||
case Imm1:
|
||||
case Fpr:
|
||||
case Imm4:
|
||||
case Imm8:
|
||||
case Disimm16:
|
||||
case Spr:
|
||||
case Sgr:
|
||||
};
|
||||
|
||||
}
|
||||
}
|
||||
int i;
|
||||
unsigned int retval = 1;
|
||||
|
||||
for(i = 0; i<5; i++) {
|
||||
switch(ArgType[i]) {
|
||||
case none:
|
||||
break;
|
||||
case Gpr:
|
||||
case Gpr0:
|
||||
Type::UIntTy
|
||||
case Simm16:
|
||||
case Zimm16:
|
||||
case PCRelimm24:
|
||||
case Imm24:
|
||||
case Imm5:
|
||||
case PCRelimm14:
|
||||
case Imm14:
|
||||
case Imm2:
|
||||
case Crf:
|
||||
case Imm3:
|
||||
case Imm1:
|
||||
case Fpr:
|
||||
case Imm4:
|
||||
case Imm8:
|
||||
case Disimm16:
|
||||
case Spr:
|
||||
case Sgr:
|
||||
};
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -507,19 +511,20 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
|
||||
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
|
||||
unsigned int ArgType[5];
|
||||
|
||||
|
||||
ArgType[0] = (Desc.TSFlags>>PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
|
||||
ArgType[1] = (Desc.TSFlags>>PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
|
||||
ArgType[2] = (Desc.TSFlags>>PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
|
||||
ArgType[3] = (Desc.TSFlags>>PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
|
||||
ArgType[4] = (Desc.TSFlags>>PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
|
||||
|
||||
assert ( ((Desc.TSFlags & PPC32II::VMX) == 0) && "Instruction requires VMX support");
|
||||
assert ( ((Desc.TSFlags & PPC32II::PPC64) == 0) && "Instruction requires 64 bit support");
|
||||
assert((Desc.TSFlags & PPC32II::VMX == 0) &&
|
||||
"Instruction requires VMX support");
|
||||
assert((Desc.TSFlags & PPC32II::PPC64 == 0) &&
|
||||
"Instruction requires 64 bit support");
|
||||
//assert ( ValidOpcodes(MI, ArgType) && "Instruction has invalid inputs");
|
||||
++EmittedInsts;
|
||||
|
||||
if(Opcode == PPC32::MovePCtoLR) {
|
||||
if (Opcode == PPC32::MovePCtoLR) {
|
||||
O << "mflr r0\n";
|
||||
O << "bcl 20,31,L" << CurrentFnName << "$pb\n";
|
||||
O << "L" << CurrentFnName << "$pb:\n";
|
||||
@ -530,7 +535,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
|
||||
DEBUG(std::cerr << TII.getName(MI->getOpcode()) << " expects "
|
||||
<< ArgCount << " args\n");
|
||||
|
||||
if(Opcode == PPC32::LOADLoAddr) {
|
||||
if (Opcode == PPC32::LOADLoAddr) {
|
||||
printOp(MI->getOperand(0));
|
||||
O << ", ";
|
||||
printOp(MI->getOperand(1));
|
||||
@ -540,7 +545,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(Opcode == PPC32::LOADHiAddr) {
|
||||
if (Opcode == PPC32::LOADHiAddr) {
|
||||
printOp(MI->getOperand(0));
|
||||
O << ", ";
|
||||
printOp(MI->getOperand(1));
|
||||
@ -550,30 +555,29 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
|
||||
return;
|
||||
}
|
||||
|
||||
if( (ArgCount == 3) && (ArgType[1] == PPC32II::Disimm16) ) {
|
||||
if (ArgCount == 3 && ArgType[1] == PPC32II::Disimm16) {
|
||||
printOp(MI->getOperand(0));
|
||||
O << ", ";
|
||||
printOp(MI->getOperand(1));
|
||||
O << "(";
|
||||
if((ArgType[2] == PPC32II::Gpr0) && (MI->getOperand(2).getReg() == PPC32::R0)) {
|
||||
O << "0";
|
||||
} else {
|
||||
printOp(MI->getOperand(2));
|
||||
}
|
||||
if (ArgType[2] == PPC32II::Gpr0 && MI->getOperand(2).getReg() == PPC32::R0)
|
||||
O << "0";
|
||||
else
|
||||
printOp(MI->getOperand(2));
|
||||
O << ")\n";
|
||||
} else {
|
||||
for(i = 0; i< ArgCount; i++) {
|
||||
if( (ArgType[i] == PPC32II::Gpr0) && ((MI->getOperand(i).getReg()) == PPC32::R0)) {
|
||||
O << "0";
|
||||
} else {
|
||||
//std::cout << "DEBUG " << (*(TM.getRegisterInfo())).get(MI->getOperand(i).getReg()).Name << "\n";
|
||||
printOp(MI->getOperand(i));
|
||||
}
|
||||
if( ArgCount - 1 == i) {
|
||||
O << "\n";
|
||||
} else {
|
||||
O << ", ";
|
||||
}
|
||||
if (ArgType[i] == PPC32II::Gpr0 &&
|
||||
MI->getOperand(i).getReg() == PPC32::R0)
|
||||
O << "0";
|
||||
else {
|
||||
//std::cout << "DEBUG " << (*(TM.getRegisterInfo())).get(MI->getOperand(i).getReg()).Name << "\n";
|
||||
printOp(MI->getOperand(i));
|
||||
}
|
||||
if( ArgCount - 1 == i)
|
||||
O << "\n";
|
||||
else
|
||||
O << ", ";
|
||||
}
|
||||
}
|
||||
|
||||
@ -666,28 +670,28 @@ bool Printer::doFinalization(Module &M) {
|
||||
}
|
||||
}
|
||||
|
||||
for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i) {
|
||||
O << ".data\n";
|
||||
O << ".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
|
||||
O << "\t.align 2\n";
|
||||
O << "L" << *i << "$stub:\n";
|
||||
O << "\t.indirect_symbol " << *i << "\n";
|
||||
O << "\tmflr r0\n";
|
||||
O << "\tbcl 20,31,L0$" << *i << "\n";
|
||||
O << "L0$" << *i << ":\n";
|
||||
O << "\tmflr r11\n";
|
||||
O << "\taddis r11,r11,ha16(L" << *i << "$lazy_ptr-L0$" << *i << ")\n";
|
||||
O << "\tmtlr r0\n";
|
||||
O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
|
||||
O << "\tmtctr r12\n";
|
||||
O << "\tbctr\n";
|
||||
O << ".data\n";
|
||||
O << ".lazy_symbol_pointer\n";
|
||||
O << "L" << *i << "$lazy_ptr:\n";
|
||||
O << ".indirect_symbol " << *i << "\n";
|
||||
O << ".long dyld_stub_binding_helper\n";
|
||||
|
||||
}
|
||||
for(std::set<std::string>::iterator i = Stubs.begin(); i != Stubs.end(); ++i)
|
||||
{
|
||||
O << ".data\n";
|
||||
O<<".section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32\n";
|
||||
O << "\t.align 2\n";
|
||||
O << "L" << *i << "$stub:\n";
|
||||
O << "\t.indirect_symbol " << *i << "\n";
|
||||
O << "\tmflr r0\n";
|
||||
O << "\tbcl 20,31,L0$" << *i << "\n";
|
||||
O << "L0$" << *i << ":\n";
|
||||
O << "\tmflr r11\n";
|
||||
O << "\taddis r11,r11,ha16(L" << *i << "$lazy_ptr-L0$" << *i << ")\n";
|
||||
O << "\tmtlr r0\n";
|
||||
O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
|
||||
O << "\tmtctr r12\n";
|
||||
O << "\tbctr\n";
|
||||
O << ".data\n";
|
||||
O << ".lazy_symbol_pointer\n";
|
||||
O << "L" << *i << "$lazy_ptr:\n";
|
||||
O << ".indirect_symbol " << *i << "\n";
|
||||
O << ".long dyld_stub_binding_helper\n";
|
||||
}
|
||||
|
||||
delete Mang;
|
||||
return false; // success
|
||||
|
Loading…
Reference in New Issue
Block a user