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[AArch64][Falkor] Ignore SP based loads in HW prefetch fixups.

Browse Source 
Reviewers: mcrosier

Subscribers: aemerson, rengolin, javed.absar, kristof.beyls

Differential Revision: https://reviews.llvm.org/D38301

llvm-svn: 314319
This commit is contained in:
Geoff Berry 2017-09-27 17:14:10 +00:00
parent 591350a3b8
commit b33085adca
2 changed files with 29 additions and 1 deletions
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7
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
View File

@ -638,9 +638,14 @@ static Optional<LoadInfo> getLoadInfo(const MachineInstr &MI) {
break;
}
// Loads from the stack pointer don't get prefetched.
unsigned BaseReg = MI.getOperand(BaseRegIdx).getReg();
if (BaseReg == AArch64::SP || BaseReg == AArch64::WSP)
return None;
LoadInfo LI;
LI.DestReg = DestRegIdx == -1 ? 0 : MI.getOperand(DestRegIdx).getReg();
LI.BaseReg = MI.getOperand(BaseRegIdx).getReg();
LI.BaseReg = BaseReg;
LI.BaseRegIdx = BaseRegIdx;
LI.OffsetOpnd = OffsetIdx == -1 ? nullptr : &MI.getOperand(OffsetIdx);
LI.IsPrePost = IsPrePost;

23
test/CodeGen/AArch64/falkor-hwpf-fix.mir
View File

@ -330,3 +330,26 @@ body: |
bb.1:
RET_ReallyLR
...
---
# Check that we treat sp based loads as non-prefetching.
# CHECK-LABEL: name: hwpf_spbase
# CHECK-NOT: ORRXrs %xzr
# CHECK: LDRWui %x15
# CHECK: LDRWui %sp
name: hwpf_spbase
tracksRegLiveness: true
body: |
bb.0:
liveins: %w0, %x15
%w1 = LDRWui %x15, 0 :: ("aarch64-strided-access" load 4)
%w17 = LDRWui %sp, 0
%w0 = SUBWri %w0, 1, 0
%wzr = SUBSWri %w0, 0, 0, implicit-def %nzcv
Bcc 9, %bb.0, implicit %nzcv
bb.1:
RET_ReallyLR
...