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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00

Reapply 254950 w/fix

254950 ended up being not NFC.  The previous code was overriding the flags for whether an instruction read or wrote memory using the target specific flags returned via TTI.  I'd missed this in my refactoring.  Since I mistakenly built only x86 and didn't notice the number of unsupported tests, I didn't catch that before the original checkin.

This raises an interesting issue though.  Given we have function attributes (i.e. readonly, readnone, argmemonly) which describe the aliasing of intrinsics, why does TTI have this information overriding the instruction definition at all?  I see no reason for this, but decided to preserve existing behavior for the moment.  The root issue might be that we don't have a "writeonly" attribute.

Original commit message:
[EarlyCSE] Simplify and invert ParseMemoryInst [NFCI]

Restructure ParseMemoryInst - which was introduced to abstract over target specific load and stores instructions - to just query the underlying instructions. In theory, this could be slightly slower than caching the results, but in practice, it's very unlikely to be measurable.

The simple query scheme makes it far easier to understand, and much easier to extend with new queries. Given I'm about to need to add new query types, doing the cleanup first seemed worthwhile.

Do we still believe the target specific intrinsic handling is worthwhile in EarlyCSE? It adds quite a bit of complexity and makes the code harder to read. Being able to delete the abstraction entirely would be wonderful.

llvm-svn: 254957
This commit is contained in:
Philip Reames 2015-12-07 22:41:23 +00:00
parent 87b7d8abe9
commit b342730bfb
2 changed files with 57 additions and 44 deletions

View File

@ -589,6 +589,12 @@ AnalysisUsage *PMTopLevelManager::findAnalysisUsage(Pass *P) {
if (auto *N = UniqueAnalysisUsages.FindNodeOrInsertPos(ID, IP))
Node = N;
else {
#if 0
dbgs() << AU.getRequiredSet().size() << " "
<< AU.getRequiredTransitiveSet().size() << " "
<< AU.getPreservedSet().size() << " "
<< AU.getUsedSet().size() << "\n";
#endif
Node = new (AUFoldingSetNodeAllocator.Allocate()) AUFoldingSetNode(AU);
UniqueAnalysisUsages.InsertNode(Node, IP);
}

View File

@ -388,57 +388,64 @@ private:
class ParseMemoryInst {
public:
ParseMemoryInst(Instruction *Inst, const TargetTransformInfo &TTI)
: Load(false), Store(false), IsSimple(true), MayReadFromMemory(false),
MayWriteToMemory(false), MatchingId(-1), Ptr(nullptr) {
MayReadFromMemory = Inst->mayReadFromMemory();
MayWriteToMemory = Inst->mayWriteToMemory();
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
MemIntrinsicInfo Info;
if (!TTI.getTgtMemIntrinsic(II, Info))
return;
if (Info.NumMemRefs == 1) {
Store = Info.WriteMem;
Load = Info.ReadMem;
MatchingId = Info.MatchingId;
MayReadFromMemory = Info.ReadMem;
MayWriteToMemory = Info.WriteMem;
IsSimple = Info.IsSimple;
Ptr = Info.PtrVal;
}
} else if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
Load = true;
IsSimple = LI->isSimple();
Ptr = LI->getPointerOperand();
: IsTargetMemInst(false), Inst(Inst) {
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst))
if (TTI.getTgtMemIntrinsic(II, Info) && Info.NumMemRefs == 1)
IsTargetMemInst = true;
}
bool isLoad() const {
if (IsTargetMemInst) return Info.ReadMem;
return isa<LoadInst>(Inst);
}
bool isStore() const {
if (IsTargetMemInst) return Info.WriteMem;
return isa<StoreInst>(Inst);
}
bool isSimple() const {
if (IsTargetMemInst) return Info.IsSimple;
if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
return LI->isSimple();
} else if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
Store = true;
IsSimple = SI->isSimple();
Ptr = SI->getPointerOperand();
return SI->isSimple();
}
return Inst->isAtomic();
}
bool isLoad() const { return Load; }
bool isStore() const { return Store; }
bool isSimple() const { return IsSimple; }
bool isMatchingMemLoc(const ParseMemoryInst &Inst) const {
return Ptr == Inst.Ptr && MatchingId == Inst.MatchingId;
return (getPointerOperand() == Inst.getPointerOperand() &&
getMatchingId() == Inst.getMatchingId());
}
bool isValid() const { return Ptr != nullptr; }
int getMatchingId() const { return MatchingId; }
Value *getPtr() const { return Ptr; }
bool mayReadFromMemory() const { return MayReadFromMemory; }
bool mayWriteToMemory() const { return MayWriteToMemory; }
bool isValid() const { return getPointerOperand() != nullptr; }
private:
bool Load;
bool Store;
bool IsSimple;
bool MayReadFromMemory;
bool MayWriteToMemory;
// For regular (non-intrinsic) loads/stores, this is set to -1. For
// intrinsic loads/stores, the id is retrieved from the corresponding
// field in the MemIntrinsicInfo structure. That field contains
// non-negative values only.
int MatchingId;
Value *Ptr;
int getMatchingId() const {
if (IsTargetMemInst) return Info.MatchingId;
return -1;
}
Value *getPointerOperand() const {
if (IsTargetMemInst) return Info.PtrVal;
if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
return LI->getPointerOperand();
} else if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
return SI->getPointerOperand();
}
return nullptr;
}
bool mayReadFromMemory() const {
if (IsTargetMemInst) return Info.ReadMem;
return Inst->mayReadFromMemory();
}
bool mayWriteToMemory() const {
if (IsTargetMemInst) return Info.WriteMem;
return Inst->mayWriteToMemory();
}
private:
bool IsTargetMemInst;
MemIntrinsicInfo Info;
Instruction *Inst;
};
bool processNode(DomTreeNode *Node);
@ -565,7 +572,7 @@ bool EarlyCSE::processNode(DomTreeNode *Node) {
// If we have an available version of this load, and if it is the right
// generation, replace this instruction.
LoadValue InVal = AvailableLoads.lookup(MemInst.getPtr());
LoadValue InVal = AvailableLoads.lookup(MemInst.getPointerOperand());
if (InVal.Data != nullptr && InVal.Generation == CurrentGeneration &&
InVal.MatchingId == MemInst.getMatchingId()) {
Value *Op = getOrCreateResult(InVal.Data, Inst->getType());
@ -583,7 +590,7 @@ bool EarlyCSE::processNode(DomTreeNode *Node) {
// Otherwise, remember that we have this instruction.
AvailableLoads.insert(
MemInst.getPtr(),
MemInst.getPointerOperand(),
LoadValue(Inst, CurrentGeneration, MemInst.getMatchingId()));
LastStore = nullptr;
continue;
@ -659,7 +666,7 @@ bool EarlyCSE::processNode(DomTreeNode *Node) {
// to non-volatile loads, so we don't have to check for volatility of
// the store.
AvailableLoads.insert(
MemInst.getPtr(),
MemInst.getPointerOperand(),
LoadValue(Inst, CurrentGeneration, MemInst.getMatchingId()));
// Remember that this was the last normal store we saw for DSE.