diff --git a/test/CodeGen/ARM/fabss.ll b/test/CodeGen/ARM/fabss.ll index 46c2f1c65fe..c3e00ce4701 100644 --- a/test/CodeGen/ARM/fabss.ll +++ b/test/CodeGen/ARM/fabss.ll @@ -14,12 +14,12 @@ entry: declare float @fabsf(float) ; VFP2: test: -; VFP2: vabs.f32 s2, s2 +; VFP2: vabs.f32 s ; NFP1: test: -; NFP1: vabs.f32 d1, d1 +; NFP1: vabs.f32 d ; NFP0: test: -; NFP0: vabs.f32 s2, s2 +; NFP0: vabs.f32 s ; CORTEXA8: test: ; CORTEXA8: vadd.f32 [[D1:d[0-9]+]] diff --git a/test/CodeGen/ARM/fdivs.ll b/test/CodeGen/ARM/fdivs.ll index 8fab0021358..8f13f395e07 100644 --- a/test/CodeGen/ARM/fdivs.ll +++ b/test/CodeGen/ARM/fdivs.ll @@ -10,14 +10,14 @@ entry: } ; VFP2: test: -; VFP2: vdiv.f32 s0, s2, s0 +; VFP2: vdiv.f32 s{{.}}, s{{.}}, s{{.}} ; NFP1: test: -; NFP1: vdiv.f32 s0, s2, s0 +; NFP1: vdiv.f32 s{{.}}, s{{.}}, s{{.}} ; NFP0: test: -; NFP0: vdiv.f32 s0, s2, s0 +; NFP0: vdiv.f32 s{{.}}, s{{.}}, s{{.}} ; CORTEXA8: test: -; CORTEXA8: vdiv.f32 s0, s2, s0 +; CORTEXA8: vdiv.f32 s{{.}}, s{{.}}, s{{.}} ; CORTEXA9: test: ; CORTEXA9: vdiv.f32 s{{.}}, s{{.}}, s{{.}} diff --git a/test/CodeGen/ARM/fnmscs.ll b/test/CodeGen/ARM/fnmscs.ll index 6081712829a..9ce9b7ae7da 100644 --- a/test/CodeGen/ARM/fnmscs.ll +++ b/test/CodeGen/ARM/fnmscs.ll @@ -46,8 +46,8 @@ entry: ; NEON: vnmla.f64 ; A8: t3: -; A8: vnmul.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}} -; A8: vsub.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}} +; A8: vnmul.f64 d +; A8: vsub.f64 d %0 = fmul double %a, %b %1 = fsub double -0.0, %0 %2 = fsub double %1, %acc @@ -63,8 +63,8 @@ entry: ; NEON: vnmla.f64 ; A8: t4: -; A8: vnmul.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}} -; A8: vsub.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}} +; A8: vnmul.f64 d +; A8: vsub.f64 d %0 = fmul double %a, %b %1 = fmul double -1.0, %0 %2 = fsub double %1, %acc diff --git a/test/CodeGen/Thumb2/cortex-fp.ll b/test/CodeGen/Thumb2/cortex-fp.ll index b7df2fbf546..f6cea72caec 100644 --- a/test/CodeGen/Thumb2/cortex-fp.ll +++ b/test/CodeGen/Thumb2/cortex-fp.ll @@ -7,7 +7,7 @@ define float @foo(float %a, float %b) { entry: ; CHECK: foo ; CORTEXM3: blx ___mulsf3 -; CORTEXM4: vmul.f32 s0, s2, s0 +; CORTEXM4: vmul.f32 s ; CORTEXA8: vmul.f32 d %0 = fmul float %a, %b ret float %0