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PowerPC: Do not use llc -march in tests.

Browse Source 
`llc -march` is problematic because it only switches the target
architecture, but leaves the operating system unchanged. This
occasionally leads to indeterministic tests because the OS from
LLVM_DEFAULT_TARGET_TRIPLE is used.

However we can simply always use `llc -mtriple` instead. This changes
all the tests to do this to avoid people using -march when they copy and
paste parts of tests.

This patch:
- Removes -march if the .ll file already has a matching `target triple`
  directive or -mtriple argument.
- In all other cases changes -march=ppc32/-march=ppc64 to
  -mtriple=ppc32--/-mtriple=ppc64--

See also the discussion in https://reviews.llvm.org/D35287

llvm-svn: 309754
This commit is contained in:
Matthias Braun 2017-08-01 22:20:41 +00:00
parent 431b172354
commit b3a8585bc1
234 changed files with 391 additions and 397 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define void @test() { define void @test() {
%tr1 = lshr i32 1, 0 ; <i32> [#uses=0] %tr1 = lshr i32 1, 0 ; <i32> [#uses=0]
ret void ret void

2
test/CodeGen/PowerPC/2004-11-30-shift-crash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define void @main() { define void @main() {
%tr4 = shl i64 1, 0 ; <i64> [#uses=0] %tr4 = shl i64 1, 0 ; <i64> [#uses=0]

2
test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define void @main() { define void @main() {
%shamt = add i8 0, 1 ; <i8> [#uses=1] %shamt = add i8 0, 1 ; <i8> [#uses=1]

2
test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep .comm.*X,0 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep .comm.*X,0
@X = linkonce global { } zeroinitializer ; <{ }*> [#uses=0] @X = linkonce global { } zeroinitializer ; <{ }*> [#uses=0]

2
test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define i32 @main() { define i32 @main() {
%setle = icmp sle i64 1, 0 ; <i1> [#uses=1] %setle = icmp sle i64 1, 0 ; <i1> [#uses=1]

2
test/CodeGen/PowerPC/2005-01-14-UndefLong.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define i64 @test() { define i64 @test() {
ret i64 undef ret i64 undef

2
test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll
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@ -1,6 +1,6 @@
; this should not crash the ppc backend ; this should not crash the ppc backend
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define i32 @test(i32 %j.0.0.i) { define i32 @test(i32 %j.0.0.i) {

2
test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll
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@ -1,6 +1,6 @@
; This function should have exactly one call to fixdfdi, no more! ; This function should have exactly one call to fixdfdi, no more!
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mattr=-64bit | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mattr=-64bit | \
; RUN: grep "bl .*fixdfdi" | count 1 ; RUN: grep "bl .*fixdfdi" | count 1
define double @test2(double %tmp.7705) { define double @test2(double %tmp.7705) {

2
test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll
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@ -1,7 +1,7 @@
; This was erroneously being turned into an rlwinm instruction. ; This was erroneously being turned into an rlwinm instruction.
; The sign bit does matter in this case. ; The sign bit does matter in this case.
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep srawi ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep srawi
define i32 @test(i32 %X) { define i32 @test(i32 %X) {
%Y = and i32 %X, -2 ; <i32> [#uses=1] %Y = and i32 %X, -2 ; <i32> [#uses=1]

2
test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define double @CalcSpeed(float %tmp127) { define double @CalcSpeed(float %tmp127) {

2
test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
; RUN: grep "vspltish v.*, 10" ; RUN: grep "vspltish v.*, 10"
define void @test(<8 x i16>* %P) { define void @test(<8 x i16>* %P) {

2
test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5
; END. ; END.
define void @test(i8* %stack) { define void @test(i8* %stack) {

2
test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; END. ; END.
%struct.attr_desc = type { i8*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, i32 } %struct.attr_desc = type { i8*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, i32 }

2
test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define void @img2buf(i32 %symbol_size_in_bytes, i16* %ui16) nounwind { define void @img2buf(i32 %symbol_size_in_bytes, i16* %ui16) nounwind {
%tmp93 = load i16, i16* null ; <i16> [#uses=1] %tmp93 = load i16, i16* null ; <i16> [#uses=1]

4
test/CodeGen/PowerPC/2006-08-11-RetVector.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 | grep vsldoi ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vsldoi
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 | not grep vor ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | not grep vor
define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) { define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) {
%tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>> [#uses=1] %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>> [#uses=1]

2
test/CodeGen/PowerPC/2006-09-28-shift_64.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s
target datalayout = "E-p:64:64" target datalayout = "E-p:64:64"
target triple = "powerpc64-apple-darwin8" target triple = "powerpc64-apple-darwin8"

2
test/CodeGen/PowerPC/2006-10-13-Miscompile.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep IMPLICIT_DEF ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep IMPLICIT_DEF
define void @foo(i64 %X) { define void @foo(i64 %X) {
entry: entry:

2
test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep xor ; RUN: llc -verify-machineinstrs < %s | grep xor
target datalayout = "E-p:32:32" target datalayout = "E-p:32:32"
target triple = "powerpc-apple-darwin8.7.0" target triple = "powerpc-apple-darwin8.7.0"

2
test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=ppc64 ; RUN: llc < %s -mtriple=ppc64--
define i32* @foo(i32 %n) { define i32* @foo(i32 %n) {
%A = alloca i32, i32 %n ; <i32*> [#uses=1] %A = alloca i32, i32 %n ; <i32*> [#uses=1]

2
test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep rlwimi ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep rlwimi
define void @test(i16 %div.0.i.i.i.i, i32 %L_num.0.i.i.i.i, i32 %tmp1.i.i206.i.i, i16* %P) { define void @test(i16 %div.0.i.i.i.i, i32 %L_num.0.i.i.i.i, i32 %tmp1.i.i206.i.i, i16* %P) {
%X = shl i16 %div.0.i.i.i.i, 1 ; <i16> [#uses=1] %X = shl i16 %div.0.i.i.i.i, 1 ; <i16> [#uses=1]

2
test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5
define void @glgRunProcessor15() { define void @glgRunProcessor15() {
%tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >; <<4 x float>> [#uses=1] %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >; <<4 x float>> [#uses=1]

6
test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll
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@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; RUN: llc -verify-machineinstrs < %s ; RUN: llc -verify-machineinstrs < %s
; REQUIRES: default_triple ; REQUIRES: default_triple
define void @bitap() { define void @bitap() {

4
test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; RUN: llc -verify-machineinstrs < %s ; RUN: llc -verify-machineinstrs < %s
; REQUIRES: default_triple ; REQUIRES: default_triple

4
test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep extsb ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep extsb
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep extsh ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep extsh
define i32 @p1(i8 %c, i16 %s) { define i32 @p1(i8 %c, i16 %s) {
entry: entry:

2
test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 | \
; RUN: grep cntlz ; RUN: grep cntlz
define i32 @foo() nounwind { define i32 @foo() nounwind {

4
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
define i16 @test(i8* %d1, i16* %d2) { define i16 @test(i8* %d1, i16* %d2) {
%tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 ) ; <i16> [#uses=1] %tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 ) ; <i16> [#uses=1]

4
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
; Test two things: 1) that a frameidx can be rewritten in an inline asm ; Test two things: 1) that a frameidx can be rewritten in an inline asm
; 2) that inline asms can handle reg+imm addr modes. ; 2) that inline asms can handle reg+imm addr modes.

2
test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8.8.0 | \
; RUN: grep align.*3 ; RUN: grep align.*3
@X = global <{i32, i32}> <{ i32 1, i32 123 }> @X = global <{i32, i32}> <{ i32 1, i32 123 }>

2
test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5
define void @test(<4 x float>*, { { i16, i16, i32 } }*) { define void @test(<4 x float>*, { { i16, i16, i32 } }*) {
xOperationInitMasks.exit: xOperationInitMasks.exit:

4
test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "foo r3, r4" ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "foo r3, r4"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "bari r3, 47" ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "bari r3, 47"
; PR1351 ; PR1351

2
test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "powerpc-apple-darwin8.8.0" target triple = "powerpc-apple-darwin8.8.0"
%struct..0anon = type { i32 } %struct..0anon = type { i32 }

8
test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll
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@ -1,7 +1,7 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -enable-tail-merge=0 | grep bl.*baz | count 2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -enable-tail-merge=0 | grep bl.*baz | count 2
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -enable-tail-merge=0 | grep bl.*quux | count 2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -enable-tail-merge=0 | grep bl.*quux | count 2
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep bl.*baz | count 1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep bl.*baz | count 1
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep bl.*quux | count 1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep bl.*quux | count 1
; Check that tail merging is the default on ppc, and that -enable-tail-merge works. ; Check that tail merging is the default on ppc, and that -enable-tail-merge works.
; ModuleID = 'tail.c' ; ModuleID = 'tail.c'

5
test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll
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@ -1,9 +1,8 @@
; RUN: llc -verify-machineinstrs < %s | grep "rlwinm r3, r3, 23, 30, 30"
; PR1473
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "powerpc-apple-darwin8.8.0" target triple = "powerpc-apple-darwin8.8.0"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | grep "rlwinm r3, r3, 23, 30, 30"
; PR1473
define zeroext i8 @foo(i16 zeroext %a) { define zeroext i8 @foo(i16 zeroext %a) {
%tmp2 = lshr i16 %a, 10 ; <i16> [#uses=1] %tmp2 = lshr i16 %a, 10 ; <i16> [#uses=1]
%tmp23 = trunc i16 %tmp2 to i8 ; <i8> [#uses=1] %tmp23 = trunc i16 %tmp2 to i8 ; <i8> [#uses=1]

2
test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mattr=+altivec ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mattr=+altivec
%struct.XATest = type { float, i16, i8, i8 } %struct.XATest = type { float, i16, i8, i8 }
%struct.XArrayRange = type { i8, i8, i8, i8 } %struct.XArrayRange = type { i8, i8, i8, i8 }

2
test/CodeGen/PowerPC/2007-08-04-CoalescerAssert.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
; PR1596 ; PR1596
%struct._obstack_chunk = type { i8* } %struct._obstack_chunk = type { i8* }

2
test/CodeGen/PowerPC/2007-09-04-AltivecDST.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mattr=+altivec | grep dst | count 4 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mattr=+altivec | grep dst | count 4
define hidden void @_Z4borkPc(i8* %image) { define hidden void @_Z4borkPc(i8* %image) {
entry: entry:

4
test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -O1 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -O1 | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck --check-prefix=CHECK-OPT %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- | FileCheck --check-prefix=CHECK-OPT %s
%struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] } %struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] }
%struct.__mutex_t = type { i32 } %struct.__mutex_t = type { i32 }

2
test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
%struct.TCMalloc_SpinLock = type { i32 } %struct.TCMalloc_SpinLock = type { i32 }

2
test/CodeGen/PowerPC/2007-10-16-InlineAsmFrameOffset.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; rdar://5538377 ; rdar://5538377
%struct.disk_unsigned = type { i32 } %struct.disk_unsigned = type { i32 }

2
test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mattr=+altivec ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mattr=+altivec
%struct.inoutprops = type <{ i8, [3 x i8] }> %struct.inoutprops = type <{ i8, [3 x i8] }>
define void @bork(float* %argA, float* %argB, float* %res, i8 %inoutspec.0) { define void @bork(float* %argA, float* %argB, float* %res, i8 %inoutspec.0) {

6
test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll
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@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s ; RUN: llc -verify-machineinstrs < %s
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g3
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5
; PR1811 ; PR1811
; REQUIRES: default_triple ; REQUIRES: default_triple

2
test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
%struct._cpp_strbuf = type { i8*, i32, i32 } %struct._cpp_strbuf = type { i8*, i32, i32 }
%struct.cpp_string = type { i32, i8* } %struct.cpp_string = type { i32, i8* }

2
test/CodeGen/PowerPC/2008-03-18-RegScavengerAssert.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
define i16 @test(i8* %d1, i16* %d2) { define i16 @test(i8* %d1, i16* %d2) {
%tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 ) %tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 )

2
test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
define fastcc i8* @page_rec_get_next(i8* %rec) nounwind { define fastcc i8* @page_rec_get_next(i8* %rec) nounwind {
entry: entry:

2
test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
%struct..0objc_object = type { %struct.objc_class* } %struct..0objc_object = type { %struct.objc_class* }
%struct.NSArray = type { %struct..0objc_object } %struct.NSArray = type { %struct..0objc_object }

2
test/CodeGen/PowerPC/2008-05-01-ppc_fp128.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s
target triple = "powerpc-apple-darwin9.2.2" target triple = "powerpc-apple-darwin9.2.2"
define i256 @func(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind readnone { define i256 @func(ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind readnone {

2
test/CodeGen/PowerPC/2008-06-19-LegalizerCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
define void @t() nounwind { define void @t() nounwind {
call void null( ppc_fp128 undef ) call void null( ppc_fp128 undef )

2
test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
@g = external global ppc_fp128 @g = external global ppc_fp128
@h = external global ppc_fp128 @h = external global ppc_fp128

2
test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
; <rdar://problem/6020042> ; <rdar://problem/6020042>
define i32 @bork() nounwind { define i32 @bork() nounwind {

4
test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 | grep vadduhm ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vadduhm
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 | grep vsubuhm ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vsubuhm
define <4 x i32> @test() nounwind { define <4 x i32> @test() nounwind {
ret <4 x i32> < i32 4293066722, i32 4293066722, i32 4293066722, i32 4293066722> ret <4 x i32> < i32 4293066722, i32 4293066722, i32 4293066722, i32 4293066722>

2
test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind { define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
entry: entry:

2
test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -o - | not grep fixunstfsi ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -o - | not grep fixunstfsi
define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone { define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
entry: entry:

2
test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=ppc32 -verify-machineinstrs ; RUN: llc < %s -mtriple=ppc32-- -verify-machineinstrs
; Machine code verifier will call isRegTiedToDefOperand() on /all/ register use ; Machine code verifier will call isRegTiedToDefOperand() on /all/ register use
; operands. We must make sure that the operand flag is found correctly. ; operands. We must make sure that the operand flag is found correctly.

2
test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin10 -mcpu=g5 -disable-ppc-ilp-pref | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mcpu=g5 -disable-ppc-ilp-pref | FileCheck %s
; ModuleID = '<stdin>' ; ModuleID = '<stdin>'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
target triple = "powerpc-apple-darwin10.0" target triple = "powerpc-apple-darwin10.0"

2
test/CodeGen/PowerPC/2009-09-18-carrybit.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs -march=ppc32 < %s | FileCheck %s ; RUN: llc -verify-machineinstrs < %s | FileCheck %s
; ModuleID = '<stdin>' ; ModuleID = '<stdin>'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
target triple = "powerpc-apple-darwin9.6" target triple = "powerpc-apple-darwin9.6"

2
test/CodeGen/PowerPC/2010-03-09-indirect-call.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=g5 -mtriple=powerpc-apple-darwin10.0 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mcpu=g5 -mtriple=powerpc-apple-darwin10.0 | FileCheck %s
; ModuleID = 'nn.c' ; ModuleID = 'nn.c'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
target triple = "powerpc-apple-darwin11.0" target triple = "powerpc-apple-darwin11.0"

4
test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
View File

@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=basic | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=basic | FileCheck %s
declare i8* @llvm.frameaddress(i32) nounwind readnone declare i8* @llvm.frameaddress(i32) nounwind readnone

2
test/CodeGen/PowerPC/Atomics-64.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=ppc64 -verify-machineinstrs ; RUN: llc < %s -verify-machineinstrs
; ;
; This test is disabled until PPCISelLowering learns to insert proper 64-bit ; This test is disabled until PPCISelLowering learns to insert proper 64-bit
; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with ; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with

2
test/CodeGen/PowerPC/DbgValueOtherTargets.test
View File

@ -1 +1 @@
RUN: llc -O0 -march=ppc32 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll RUN: llc -O0 -mtriple=ppc32-- -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll

14
test/CodeGen/PowerPC/Frames-alloca.ll
View File

@ -1,10 +1,10 @@
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC32 ; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC32
; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC64 ; RUN: llc < %s -mtriple=powerpc64-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC64
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=CHECK-PPC32-NOFP ; RUN: llc < %s -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=CHECK-PPC32-NOFP
; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=CHECK-PPC64-NOFP ; RUN: llc < %s -mtriple=powerpc64-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=CHECK-PPC64-NOFP
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC32 ; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC32
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC32-RS ; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=CHECK-PPC32-RS
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=CHECK-PPC32-RS-NOFP ; RUN: llc < %s -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=CHECK-PPC32-RS-NOFP
; CHECK-PPC32: stw r31, -4(r1) ; CHECK-PPC32: stw r31, -4(r1)
; CHECK-PPC32: lwz r1, 0(r1) ; CHECK-PPC32: lwz r1, 0(r1)

11
test/CodeGen/PowerPC/Frames-large.ll
View File

@ -1,11 +1,8 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | FileCheck %s -check-prefix=PPC32-NOFP ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=PPC32-NOFP
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -disable-fp-elim | FileCheck %s -check-prefix=PPC32-FP ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=PPC32-FP
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck %s -check-prefix=PPC64-NOFP ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-apple-darwin8 | FileCheck %s -check-prefix=PPC64-NOFP
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -disable-fp-elim | FileCheck %s -check-prefix=PPC64-FP ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-apple-darwin8 -disable-fp-elim | FileCheck %s -check-prefix=PPC64-FP
target triple = "powerpc-apple-darwin8"
define i32* @f1() nounwind { define i32* @f1() nounwind {
%tmp = alloca i32, i32 8191 ; <i32*> [#uses=1] %tmp = alloca i32, i32 8191 ; <i32*> [#uses=1]

32
test/CodeGen/PowerPC/Frames-leaf.ll
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@ -1,34 +1,34 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: not grep "stw r31, 20(r1)" ; RUN: not grep "stw r31, 20(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: not grep "stwu r1, -.*(r1)" ; RUN: not grep "stwu r1, -.*(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: not grep "addi r1, r1, " ; RUN: not grep "addi r1, r1, "
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: not grep "lwz r31, 20(r1)" ; RUN: not grep "lwz r31, 20(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -disable-fp-elim | \
; RUN: not grep "stw r31, 20(r1)" ; RUN: not grep "stw r31, 20(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -disable-fp-elim | \
; RUN: not grep "stwu r1, -.*(r1)" ; RUN: not grep "stwu r1, -.*(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -disable-fp-elim | \
; RUN: not grep "addi r1, r1, " ; RUN: not grep "addi r1, r1, "
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -disable-fp-elim | \
; RUN: not grep "lwz r31, 20(r1)" ; RUN: not grep "lwz r31, 20(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- | \
; RUN: not grep "std r31, 40(r1)" ; RUN: not grep "std r31, 40(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- | \
; RUN: not grep "stdu r1, -.*(r1)" ; RUN: not grep "stdu r1, -.*(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- | \
; RUN: not grep "addi r1, r1, " ; RUN: not grep "addi r1, r1, "
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- | \
; RUN: not grep "ld r31, 40(r1)" ; RUN: not grep "ld r31, 40(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -disable-fp-elim | \
; RUN: not grep "stw r31, 40(r1)" ; RUN: not grep "stw r31, 40(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -disable-fp-elim | \
; RUN: not grep "stdu r1, -.*(r1)" ; RUN: not grep "stdu r1, -.*(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -disable-fp-elim | \
; RUN: not grep "addi r1, r1, " ; RUN: not grep "addi r1, r1, "
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -disable-fp-elim | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -disable-fp-elim | \
; RUN: not grep "ld r31, 40(r1)" ; RUN: not grep "ld r31, 40(r1)"
define i32* @f1() { define i32* @f1() {

10
test/CodeGen/PowerPC/Frames-small.ll
View File

@ -1,21 +1,21 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 -o %t1
; RUN: not grep "stw r31, -4(r1)" %t1 ; RUN: not grep "stw r31, -4(r1)" %t1
; RUN: grep "stwu r1, -16416(r1)" %t1 ; RUN: grep "stwu r1, -16416(r1)" %t1
; RUN: grep "addi r1, r1, 16416" %t1 ; RUN: grep "addi r1, r1, 16416" %t1
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: not grep "lwz r31, -4(r1)" ; RUN: not grep "lwz r31, -4(r1)"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
; RUN: -o %t2 ; RUN: -o %t2
; RUN: grep "stw r31, -4(r1)" %t2 ; RUN: grep "stw r31, -4(r1)" %t2
; RUN: grep "stwu r1, -16416(r1)" %t2 ; RUN: grep "stwu r1, -16416(r1)" %t2
; RUN: grep "addi r1, r1, 16416" %t2 ; RUN: grep "addi r1, r1, 16416" %t2
; RUN: grep "lwz r31, -4(r1)" %t2 ; RUN: grep "lwz r31, -4(r1)" %t2
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-apple-darwin8 -o %t3
; RUN: not grep "std r31, -8(r1)" %t3 ; RUN: not grep "std r31, -8(r1)" %t3
; RUN: grep "stdu r1, -16432(r1)" %t3 ; RUN: grep "stdu r1, -16432(r1)" %t3
; RUN: grep "addi r1, r1, 16432" %t3 ; RUN: grep "addi r1, r1, 16432" %t3
; RUN: not grep "ld r31, -8(r1)" %t3 ; RUN: not grep "ld r31, -8(r1)" %t3
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-apple-darwin8 -disable-fp-elim \
; RUN: -o %t4 ; RUN: -o %t4
; RUN: grep "std r31, -8(r1)" %t4 ; RUN: grep "std r31, -8(r1)" %t4
; RUN: grep "stdu r1, -16448(r1)" %t4 ; RUN: grep "stdu r1, -16448(r1)" %t4

6
test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
View File

@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin | \
; RUN: grep "stw r3, 32751" ; RUN: grep "stw r3, 32751"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-apple-darwin | \
; RUN: grep "stw r3, 32751" ; RUN: grep "stw r3, 32751"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mtriple=powerpc-apple-darwin | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-apple-darwin | \
; RUN: grep "std r3, 9024" ; RUN: grep "std r3, 9024"
define void @test() nounwind { define void @test() nounwind {

2
test/CodeGen/PowerPC/MergeConsecutiveStores.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs -march=ppc32 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec < %s | FileCheck %s ; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec < %s | FileCheck %s
;; This test ensures that MergeConsecutiveStores does not attempt to ;; This test ensures that MergeConsecutiveStores does not attempt to
;; merge stores or loads when doing so would result in unaligned ;; merge stores or loads when doing so would result in unaligned

2
test/CodeGen/PowerPC/a2-fp-basic.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=a2 -fp-contract=fast | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=a2 -fp-contract=fast | FileCheck %s
%0 = type { double, double } %0 = type { double, double }

6
test/CodeGen/PowerPC/a2q-stackalign.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=a2q | FileCheck -check-prefix=CHECK-A2Q %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=a2q | FileCheck -check-prefix=CHECK-A2Q %s
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mtriple=powerpc64-bgq-linux -mcpu=a2 | FileCheck -check-prefix=CHECK-BGQ %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-bgq-linux -mcpu=a2 | FileCheck -check-prefix=CHECK-BGQ %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"

4
test/CodeGen/PowerPC/a2q.ll
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@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=a2q | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=a2q | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=a2 -mattr=+qpx | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=a2 -mattr=+qpx | FileCheck %s
define void @foo() { define void @foo() {
entry: entry:

2
test/CodeGen/PowerPC/addi-reassoc.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep addi ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep addi
%struct.X = type { [5 x i8] } %struct.X = type { [5 x i8] }

2
test/CodeGen/PowerPC/and-branch.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep mfcr ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep mfcr
define void @foo(i32 %X, i32 %Y, i32 %Z) { define void @foo(i32 %X, i32 %Y, i32 %Z) {
entry: entry:

2
test/CodeGen/PowerPC/and-elim.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep rlwin ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep rlwin
define void @test(i8* %P) { define void @test(i8* %P) {
%W = load i8, i8* %P %W = load i8, i8* %P

2
test/CodeGen/PowerPC/and-imm.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep "ori\|lis" ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep "ori\|lis"
; andi. r3, r3, 32769 ; andi. r3, r3, 32769
define i32 @test(i32 %X) { define i32 @test(i32 %X) {

2
test/CodeGen/PowerPC/and_add.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -o %t ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -o %t
; RUN: grep slwi %t ; RUN: grep slwi %t
; RUN: not grep addi %t ; RUN: not grep addi %t
; RUN: not grep rlwinm %t ; RUN: not grep rlwinm %t

4
test/CodeGen/PowerPC/and_sext.ll
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@ -1,6 +1,6 @@
; These tests should not contain a sign extend. ; These tests should not contain a sign extend.
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep extsh ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep extsh
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep extsb ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep extsb
define i32 @test1(i32 %mode.0.i.0) { define i32 @test1(i32 %mode.0.i.0) {
%tmp.79 = trunc i32 %mode.0.i.0 to i16 %tmp.79 = trunc i32 %mode.0.i.0 to i16

2
test/CodeGen/PowerPC/and_sra.ll
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@ -1,5 +1,5 @@
; Neither of these functions should contain algebraic right shifts ; Neither of these functions should contain algebraic right shifts
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep srawi ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep srawi
define i32 @test1(i32 %mode.0.i.0) { define i32 @test1(i32 %mode.0.i.0) {
%tmp.79 = bitcast i32 %mode.0.i.0 to i32 ; <i32> [#uses=1] %tmp.79 = bitcast i32 %mode.0.i.0 to i32 ; <i32> [#uses=1]

2
test/CodeGen/PowerPC/asm-Zy.ll
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@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -mcpu=a2 | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-bgq-linux" target triple = "powerpc64-bgq-linux"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=a2 | FileCheck %s
define i32 @zytest(i32 %a) nounwind { define i32 @zytest(i32 %a) nounwind {
entry: entry:

2
test/CodeGen/PowerPC/atomic-1.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin -march=ppc32 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin | FileCheck %s
define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind { define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
; CHECK-LABEL: exchange_and_add: ; CHECK-LABEL: exchange_and_add:

8
test/CodeGen/PowerPC/atomic-2.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -ppc-asm-full-reg-names -march=ppc64 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE ; RUN: llc < %s -ppc-asm-full-reg-names -mtriple=ppc64-- | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
; RUN: llc < %s -ppc-asm-full-reg-names -march=ppc64le -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE ; RUN: llc < %s -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
; RUN: llc < %s -ppc-asm-full-reg-names -march=ppc64 -mcpu=pwr7 | FileCheck %s ; RUN: llc < %s -ppc-asm-full-reg-names -mtriple=ppc64-- -mcpu=pwr7 | FileCheck %s
; RUN: llc < %s -ppc-asm-full-reg-names -march=ppc64 -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-P8U ; RUN: llc < %s -ppc-asm-full-reg-names -mtriple=ppc64-- -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-P8U
define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind { define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
; CHECK-LABEL: exchange_and_add: ; CHECK-LABEL: exchange_and_add:

4
test/CodeGen/PowerPC/atomics-fences.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc32 -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=powerpc-apple-darwin -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc64 -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=powerpc64-apple-darwin -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc-apple-darwin -mcpu=440 | FileCheck %s --check-prefix=PPC440 ; RUN: llc < %s -mtriple=powerpc-apple-darwin -mcpu=440 | FileCheck %s --check-prefix=PPC440
; Fences ; Fences

4
test/CodeGen/PowerPC/atomics-indexed.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc32 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=PPC32 ; RUN: llc < %s -mtriple=powerpc-apple-darwin -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=PPC32
; FIXME: -verify-machineinstrs currently fail on ppc64 (mismatched register/instruction). ; FIXME: -verify-machineinstrs currently fail on ppc64 (mismatched register/instruction).
; This is already checked for in Atomics-64.ll ; This is already checked for in Atomics-64.ll
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc64 | FileCheck %s --check-prefix=CHECK --check-prefix=PPC64 ; RUN: llc < %s -mtriple=powerpc64-apple-darwin | FileCheck %s --check-prefix=CHECK --check-prefix=PPC64
; In this file, we check that atomic load/store can make use of the indexed ; In this file, we check that atomic load/store can make use of the indexed
; versions of the instructions. ; versions of the instructions.

4
test/CodeGen/PowerPC/atomics.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc32 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=PPC32 ; RUN: llc < %s -mtriple=powerpc-apple-darwin -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=PPC32
; FIXME: -verify-machineinstrs currently fail on ppc64 (mismatched register/instruction). ; FIXME: -verify-machineinstrs currently fail on ppc64 (mismatched register/instruction).
; This is already checked for in Atomics-64.ll ; This is already checked for in Atomics-64.ll
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc64 | FileCheck %s --check-prefix=CHECK --check-prefix=PPC64 ; RUN: llc < %s -mtriple=powerpc64-apple-darwin | FileCheck %s --check-prefix=CHECK --check-prefix=PPC64
; FIXME: we don't currently check for the operations themselves with CHECK-NEXT, ; FIXME: we don't currently check for the operations themselves with CHECK-NEXT,
; because they are implemented in a very messy way with lwarx/stwcx. ; because they are implemented in a very messy way with lwarx/stwcx.

4
test/CodeGen/PowerPC/big-endian-actual-args.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | \
; RUN: grep "addc 4, 4, 6" ; RUN: grep "addc 4, 4, 6"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | \
; RUN: grep "adde 3, 3, 5" ; RUN: grep "adde 3, 3, 5"
define i64 @foo(i64 %x, i64 %y) { define i64 @foo(i64 %x, i64 %y) {

4
test/CodeGen/PowerPC/big-endian-call-result.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | \
; RUN: grep "addic 4, 4, 1" ; RUN: grep "addic 4, 4, 1"
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | \
; RUN: grep "addze 3, 3" ; RUN: grep "addze 3, 3"
declare i64 @foo() declare i64 @foo()

2
test/CodeGen/PowerPC/big-endian-formal-args.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s
declare void @bar(i64 %x, i64 %y) declare void @bar(i64 %x, i64 %y)

12
test/CodeGen/PowerPC/blockaddress.ll
View File

@ -1,9 +1,9 @@
; RUN: llc -verify-machineinstrs < %s -code-model=small -march=ppc64 -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=SMALL ; RUN: llc -verify-machineinstrs < %s -code-model=small -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=SMALL
; RUN: llc -verify-machineinstrs < %s -code-model=medium -march=ppc64 -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM ; RUN: llc -verify-machineinstrs < %s -code-model=medium -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
; RUN: llc -verify-machineinstrs < %s -code-model=large -march=ppc64 -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM ; RUN: llc -verify-machineinstrs < %s -code-model=large -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
; RUN: llc -verify-machineinstrs < %s -code-model=small -march=ppc64 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=SMALL ; RUN: llc -verify-machineinstrs < %s -code-model=small -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=SMALL
; RUN: llc -verify-machineinstrs < %s -code-model=medium -march=ppc64 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM ; RUN: llc -verify-machineinstrs < %s -code-model=medium -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
; RUN: llc -verify-machineinstrs < %s -code-model=large -march=ppc64 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM ; RUN: llc -verify-machineinstrs < %s -code-model=large -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
define i8* @test() { define i8* @test() {
entry: entry:

2
test/CodeGen/PowerPC/branch-opt.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:32:32" target datalayout = "E-p:32:32"
target triple = "powerpc-apple-darwin8.7.0" target triple = "powerpc-apple-darwin8.7.0"

8
test/CodeGen/PowerPC/bswap-load-store.ll
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@ -1,7 +1,7 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=ppc32 | FileCheck %s -check-prefix=X32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=ppc32 | FileCheck %s -check-prefix=X32
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=ppc64 | FileCheck %s -check-prefix=X64 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=ppc64 | FileCheck %s -check-prefix=X64
; RUN: llc -verify-machineinstrs < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s -check-prefix=PWR7 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -mcpu=pwr7 | FileCheck %s -check-prefix=PWR7
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mcpu=pwr7 | FileCheck %s -check-prefix=X32 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=pwr7 | FileCheck %s -check-prefix=X32
define void @STWBRX(i32 %i, i8* %ptr, i32 %off) { define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {

2
test/CodeGen/PowerPC/buildvec_canonicalize.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -mattr=-vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mattr=-vsx -mtriple=ppc32-- -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s
define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) { define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
%tmp = load <4 x float>, <4 x float>* %P3 ; <<4 x float>> [#uses=1] %tmp = load <4 x float>, <4 x float>* %P3 ; <<4 x float>> [#uses=1]

6
test/CodeGen/PowerPC/calls.ll
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@ -1,10 +1,10 @@
; Test various forms of calls. ; Test various forms of calls.
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: grep "bl " | count 1 ; RUN: grep "bl " | count 1
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: grep "bctrl" | count 1 ; RUN: grep "bctrl" | count 1
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: grep "bla " | count 1 ; RUN: grep "bla " | count 1
declare void @foo() declare void @foo()

2
test/CodeGen/PowerPC/cmp-cmp.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | not grep mfcr ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep mfcr
define void @test(i64 %X) { define void @test(i64 %X) {
%tmp1 = and i64 %X, 3 ; <i64> [#uses=1] %tmp1 = and i64 %X, 3 ; <i64> [#uses=1]

2
test/CodeGen/PowerPC/coal-sections.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -mtriple powerpc-apple-darwin8 -march=ppc32 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple powerpc-apple-darwin8 | FileCheck %s
; Check that *coal* sections are emitted. ; Check that *coal* sections are emitted.

2
test/CodeGen/PowerPC/coalesce-ext.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs -march=ppc64 -mcpu=g5 -mtriple=powerpc64-apple-darwin < %s | FileCheck %s ; RUN: llc -verify-machineinstrs -mcpu=g5 -mtriple=powerpc64-apple-darwin < %s | FileCheck %s
; Check that the peephole optimizer knows about sext and zext instructions. ; Check that the peephole optimizer knows about sext and zext instructions.
; CHECK: test1sext ; CHECK: test1sext
define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind { define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {

2
test/CodeGen/PowerPC/compare-simm.ll
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@ -1,4 +1,4 @@
; RUN: llc -verify-machineinstrs < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s
define i32 @test(i32 %x) nounwind { define i32 @test(i32 %x) nounwind {
; CHECK-LABEL: @test ; CHECK-LABEL: @test

6
test/CodeGen/PowerPC/constants.ll
View File

@ -1,9 +1,9 @@
; All of these routines should be perform optimal load of constants. ; All of these routines should be perform optimal load of constants.
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: grep lis | count 5 ; RUN: grep lis | count 5
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: grep ori | count 3 ; RUN: grep ori | count 3
; RUN: llc -verify-machineinstrs < %s -march=ppc32 | \ ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | \
; RUN: grep "li " | count 4 ; RUN: grep "li " | count 4
define i32 @f1() { define i32 @f1() {

2
test/CodeGen/PowerPC/cr_spilling.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=ppc32 -regalloc=fast -O0 -relocation-model=pic -o - ; RUN: llc < %s -mtriple=ppc32-- -regalloc=fast -O0 -relocation-model=pic -o -
; PR1638 ; PR1638
@.str242 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1] @.str242 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1]

2
test/CodeGen/PowerPC/ctrloop-asm.ll
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@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-freebsd10.0" target triple = "powerpc64-unknown-freebsd10.0"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck %s
define void @test1(i32 %c) nounwind { define void @test1(i32 %c) nounwind {
entry: entry:

2
test/CodeGen/PowerPC/ctrloop-le.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck %s
; XFAIL: * ; XFAIL: *
; SE needs improvement ; SE needs improvement

2
test/CodeGen/PowerPC/ctrloop-lt.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck %s
; XFAIL: * ; XFAIL: *
; SE needs improvement ; SE needs improvement

2
test/CodeGen/PowerPC/ctrloop-ne.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck %s
; CHECK: test_pos1_ir_ne ; CHECK: test_pos1_ir_ne
; CHECK: bdnz ; CHECK: bdnz

2
test/CodeGen/PowerPC/ctrloop-reg.ll
View File

@ -1,7 +1,7 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
; ModuleID = 'bugpoint-reduced-simplified.bc' ; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
; RUN: llc -verify-machineinstrs < %s -march=ppc64 | FileCheck %s
%struct.ref_s.1.49.91.115.121.139.145.151.157.163.169.175.181.211 = type { %union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210, i16, i16 } %struct.ref_s.1.49.91.115.121.139.145.151.157.163.169.175.181.211 = type { %union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210, i16, i16 }
%union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210 = type { i64 } %union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210 = type { i64 }

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