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[AMDGPU][MC] Corrected error position for invalid dim modifiers

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Fixed bug 49054.

Differential Revision: https://reviews.llvm.org/D96117
This commit is contained in:
Dmitry Preobrazhensky 2021-02-08 14:31:08 +03:00
parent 0302614818
commit b44e64be9e
3 changed files with 63 additions and 34 deletions
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67
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -1483,6 +1483,7 @@ public:
void cvtMIMGAtomic(MCInst &Inst, const OperandVector &Operands);
void cvtIntersectRay(MCInst &Inst, const OperandVector &Operands);
bool parseDimId(unsigned &Encoding);
OperandMatchResultTy parseDim(OperandVector &Operands);
OperandMatchResultTy parseDPP8(OperandVector &Operands);
OperandMatchResultTy parseDPPCtrl(OperandVector &Operands);
@ -7177,6 +7178,39 @@ bool AMDGPUOperand::isU16Imm() const {
return isImm() && isUInt<16>(getImm());
}
//===----------------------------------------------------------------------===//
// dim
//===----------------------------------------------------------------------===//
bool AMDGPUAsmParser::parseDimId(unsigned &Encoding) {
// We want to allow "dim:1D" etc.,
// but the initial 1 is tokenized as an integer.
std::string Token;
if (isToken(AsmToken::Integer)) {
SMLoc Loc = getToken().getEndLoc();
Token = std::string(getTokenStr());
lex();
if (getLoc() != Loc)
return false;
}
StringRef Suffix;
if (!parseId(Suffix))
return false;
Token += Suffix;
StringRef DimId = Token;
if (DimId.startswith("SQ_RSRC_IMG_"))
DimId = DimId.drop_front(12);
const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByAsmSuffix(DimId);
if (!DimInfo)
return false;
Encoding = DimInfo->Encoding;
return true;
}
OperandMatchResultTy AMDGPUAsmParser::parseDim(OperandVector &Operands) {
if (!isGFX10Plus())
return MatchOperand_NoMatch;
@ -7186,35 +7220,22 @@ OperandMatchResultTy AMDGPUAsmParser::parseDim(OperandVector &Operands) {
if (!trySkipId("dim", AsmToken::Colon))
return MatchOperand_NoMatch;
// We want to allow "dim:1D" etc., but the initial 1 is tokenized as an
// integer.
std::string Token;
if (isToken(AsmToken::Integer)) {
SMLoc Loc = getToken().getEndLoc();
Token = std::string(getTokenStr());
lex();
if (getLoc() != Loc)
return MatchOperand_ParseFail;
unsigned Encoding;
SMLoc Loc = getLoc();
if (!parseDimId(Encoding)) {
Error(Loc, "invalid dim value");
return MatchOperand_ParseFail;
}
if (!isToken(AsmToken::Identifier))
return MatchOperand_ParseFail;
Token += getTokenStr();
StringRef DimId = Token;
if (DimId.startswith("SQ_RSRC_IMG_"))
DimId = DimId.substr(12);
const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByAsmSuffix(DimId);
if (!DimInfo)
return MatchOperand_ParseFail;
lex();
Operands.push_back(AMDGPUOperand::CreateImm(this, DimInfo->Encoding, S,
Operands.push_back(AMDGPUOperand::CreateImm(this, Encoding, S,
AMDGPUOperand::ImmTyDim));
return MatchOperand_Success;
}
//===----------------------------------------------------------------------===//
// dpp
//===----------------------------------------------------------------------===//
OperandMatchResultTy AMDGPUAsmParser::parseDPP8(OperandVector &Operands) {
SMLoc S = getLoc();

2
test/MC/AMDGPU/gfx10_asm_mimg_err.s
View File

@ -35,4 +35,4 @@ image_sample_c_d_cl_o v[0:3], v[0:7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_
// NOGFX10: :[[@LINE-1]]:{{[0-9]+}}: error: image address size does not match dim and a16
image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
// NOGFX10: :[[@LINE-1]]:{{[0-9]+}}: error: failed parsing operand
// NOGFX10: :[[@LINE-1]]:{{[0-9]+}}: error: invalid dim value

28
test/MC/AMDGPU/gfx10_err_pos.s
View File

@ -548,21 +548,11 @@ s_sendmsg sendmsg(MSG_GS, GS_OP_CUTX, 0)
//==============================================================================
// failed parsing operand.
image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
// CHECK: error: failed parsing operand.
// CHECK-NEXT:{{^}}image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
// CHECK-NEXT:{{^}} ^
v_ceil_f16 v0, abs(neg(1))
// CHECK: error: failed parsing operand.
// CHECK-NEXT:{{^}}v_ceil_f16 v0, abs(neg(1))
// CHECK-NEXT:{{^}} ^
image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
// CHECK: error: failed parsing operand.
// CHECK-NEXT:{{^}}image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
// CHECK-NEXT:{{^}} ^
//==============================================================================
// first register index should not exceed second index
@ -669,6 +659,24 @@ s_waitcnt vmcnt(0) & expcnt(0) x(0)
// CHECK-NEXT:{{^}}s_waitcnt vmcnt(0) & expcnt(0) x(0)
// CHECK-NEXT:{{^}} ^
//==============================================================================
// invalid dim value
image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
// CHECK: error: invalid dim value
// CHECK-NEXT:{{^}}image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
// CHECK-NEXT:{{^}} ^
image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
// CHECK: error: invalid dim value
// CHECK-NEXT:{{^}}image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
// CHECK-NEXT:{{^}} ^
image_load v[0:1], v0, s[0:7] dmask:0x9 dim:7D
// CHECK: error: invalid dim value
// CHECK-NEXT:{{^}}image_load v[0:1], v0, s[0:7] dmask:0x9 dim:7D
// CHECK-NEXT:{{^}} ^
//==============================================================================
// invalid dst_sel value