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Fix PR4419: handle defs of partial uses.
llvm-svn: 73816
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@ -359,12 +359,11 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
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// That is, unless we are currently processing the last reference itself.
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LastRefOrPartRef->addRegisterDead(Reg, TRI, true);
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/* Partial uses. Mark register def dead and add implicit def of
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sub-registers which are used.
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FIXME: LiveIntervalAnalysis can't handle this yet!
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EAX<dead> = op AL<imp-def>
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That is, EAX def is dead but AL def extends pass it.
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Enable this after live interval analysis is fixed to improve codegen!
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// Partial uses. Mark register def dead and add implicit def of
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// sub-registers which are used.
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// EAX<dead> = op AL<imp-def>
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// That is, EAX def is dead but AL def extends pass it.
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// Enable this after live interval analysis is fixed to improve codegen!
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else if (!PhysRegUse[Reg]) {
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PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true);
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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@ -377,7 +376,7 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
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PartUses.erase(*SS);
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}
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}
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} */
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}
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else
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LastRefOrPartRef->addRegisterKilled(Reg, TRI, true);
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return true;
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30
test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll
Normal file
30
test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll
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@ -0,0 +1,30 @@
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; RUN: llvm-as < %s | llc -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
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; PR4419
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define float @__ieee754_acosf(float %x) nounwind {
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entry:
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br i1 undef, label %bb, label %bb4
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bb: ; preds = %entry
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ret float undef
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bb4: ; preds = %entry
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br i1 undef, label %bb5, label %bb6
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bb5: ; preds = %bb4
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ret float undef
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bb6: ; preds = %bb4
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br i1 undef, label %bb11, label %bb12
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bb11: ; preds = %bb6
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%0 = tail call float @__ieee754_sqrtf(float undef) nounwind ; <float> [#uses=1]
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%1 = fmul float %0, -2.000000e+00 ; <float> [#uses=1]
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%2 = fadd float %1, 0x400921FB40000000 ; <float> [#uses=1]
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ret float %2
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bb12: ; preds = %bb6
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ret float undef
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}
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declare float @__ieee754_sqrtf(float)
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