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Address comments on r217622

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llvm-svn: 217680
This commit is contained in:
Bill Schmidt 2014-09-12 14:26:36 +00:00
parent e18ff10a80
commit b47e7e1e1d
2 changed files with 18 additions and 4 deletions
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10
lib/Target/PowerPC/PPCAsmPrinter.cpp
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@ -278,10 +278,12 @@ bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
case 'U': // Print 'u' for update form. case 'U': // Print 'u' for update form.
case 'X': // Print 'x' for indexed form. case 'X': // Print 'x' for indexed form.
{ {
// Memory constraints should always produce an MO_Register, // FIXME: Currently for PowerPC memory operands are always loaded
// so we never get an update or indexed form. (In GCC, these // into a register, so we never get an update or indexed form.
// are useful in internal code gen; not so much in inline asm.) // This is bad even for offset forms, since even if we know we
// So tolerate these but don't output anything. // have a value in -16(r1), we will generate a load into r<n>
// and then load from 0(r<n>). Until that issue is fixed,
// tolerate 'U' and 'X' but don't output anything.
assert(MI->getOperand(OpNo).isReg()); assert(MI->getOperand(OpNo).isReg());
return false; return false;
} }

12
test/CodeGen/PowerPC/asm-constraints.ll
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@ -1,5 +1,17 @@
; RUN: llc < %s -mcpu=pwr8 | FileCheck %s ; RUN: llc < %s -mcpu=pwr8 | FileCheck %s
; Generated from following C code:
;
; void foo (int result, char *addr) {
; __asm__ __volatile__ (
; "ld%U1%X1 %0,%1\n"
; "cmpw %0,%0\n"
; "bne- 1f\n"
; "1: isync\n"
; : "=r" (result)
; : "m"(*addr) : "memory", "cr0");
; }
target datalayout = "e-m:e-i64:64-n32:64" target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu" target triple = "powerpc64le-unknown-linux-gnu"