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[AMDGPU] Remove set_gpr_idx instructions in conditional blocks

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SIPreEmitPeephole did not try to remove redundant s_set_gpr_idx_*
instructions in blocks that end with a conditional branch instruction.
This seems like a simple oversight.

Differential Revision: https://reviews.llvm.org/D101629
This commit is contained in:
Jay Foad 2021-04-30 14:53:47 +01:00
parent 8d71021388
commit b4ca76eab1
2 changed files with 4 additions and 16 deletions
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14
lib/Target/AMDGPU/SIPreEmitPeephole.cpp
View File

@ -349,8 +349,7 @@ bool SIPreEmitPeephole::runOnMachineFunction(MachineFunction &MF) {
MF.RenumberBlocks();
for (MachineBasicBlock &MBB : MF) {
MachineBasicBlock::iterator MBBE = MBB.getFirstTerminator();
MachineBasicBlock::iterator TermI = MBBE;
MachineBasicBlock::iterator TermI = MBB.getFirstTerminator();
// Check first terminator for branches to optimize
if (TermI != MBB.end()) {
MachineInstr &MI = *TermI;
@ -358,11 +357,9 @@ bool SIPreEmitPeephole::runOnMachineFunction(MachineFunction &MF) {
case AMDGPU::S_CBRANCH_VCCZ:
case AMDGPU::S_CBRANCH_VCCNZ:
Changed |= optimizeVccBranch(MI);
continue;
break;
case AMDGPU::S_CBRANCH_EXECZ:
Changed |= removeExeczBranch(MI, MBB);
continue;
default:
break;
}
}
@ -378,11 +375,8 @@ bool SIPreEmitPeephole::runOnMachineFunction(MachineFunction &MF) {
// and limit the distance to 20 instructions for compile time purposes.
// Note: this needs to work on bundles as S_SET_GPR_IDX* instructions
// may be bundled with the instructions they modify.
for (MachineBasicBlock::instr_iterator MBBI = MBB.instr_begin();
MBBI != MBBE;) {
MachineInstr &MI = *MBBI;
++MBBI;
for (auto &MI :
make_early_inc_range(make_range(MBB.instr_begin(), MBB.instr_end()))) {
if (Count == Threshold)
SetGPRMI = nullptr;
else

6
test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
View File

@ -475,7 +475,6 @@ body: |
}
...
# FIXME: remove S_SET_GPR_IDX_* despite the branch at the end of the block
---
name: simple_cbranch_vccz
body: |
@ -484,8 +483,6 @@ body: |
; GCN: successors: %bb.1(0x80000000)
; GCN: S_SET_GPR_IDX_ON $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0
; GCN: $vgpr16 = V_MOV_B32_e32 undef $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
; GCN: S_SET_GPR_IDX_ON killed $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0
; GCN: $vgpr15 = V_MOV_B32_e32 undef $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
; GCN: S_CBRANCH_VCCZ %bb.1, implicit $vcc
@ -501,7 +498,6 @@ body: |
bb.1:
...
# FIXME: remove S_SET_GPR_IDX_* despite the branch at the end of the block
---
name: simple_cbranch_execz
body: |
@ -510,8 +506,6 @@ body: |
; GCN: successors:
; GCN: S_SET_GPR_IDX_ON $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0
; GCN: $vgpr16 = V_MOV_B32_e32 undef $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
; GCN: S_SET_GPR_IDX_ON killed $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0
; GCN: $vgpr15 = V_MOV_B32_e32 undef $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0
; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode
; GCN: bb.1: