RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
Code Issues Projects Releases Wiki Activity

The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 order.

Browse Source 
llvm-svn: 92810
This commit is contained in:
Bill Wendling 2010-01-06 00:23:35 +00:00
parent 41e18c3512
commit b4f0d6e3b6
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@ -1129,8 +1129,8 @@ bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
// Prefer an ordering where the lower the non-zero order number, the higher
// the preference.
if (LOrder && ROrder && LOrder != ROrder)
return LOrder < ROrder;
if ((LOrder || ROrder) && LOrder != ROrder)
return LOrder != 0 && (LOrder < ROrder || ROrder == 0);
unsigned LPriority = SPQ->getNodePriority(left);
unsigned RPriority = SPQ->getNodePriority(right);