RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
Code Issues Projects Releases Wiki Activity

Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.

Browse Source 
llvm-svn: 85965
This commit is contained in:
Evan Cheng 2009-11-03 23:13:34 +00:00
parent eb0ca3bad7
commit b50510c510
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -448,7 +448,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
case ARM::Int_eh_sjlj_setjmp:
return 24;
case ARM::t2Int_eh_sjlj_setjmp:
return 20;
return 22;
case ARM::BR_JTr:
case ARM::BR_JTm:
case ARM::BR_JTadd:

2
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -1082,7 +1082,7 @@ let Defs =
AddrModeNone, SizeSpecial, NoItinerary,
"str.w\tsp, [$src, #+8] @ eh_setjmp begin\n"
"\tadr\tr12, 0f\n"
"\torr\tr12, #1\n"
"\torr.w\tr12, r12, #1\n"
"\tstr.w\tr12, [$src, #+4]\n"
"\tmovs\tr0, #0\n"
"\tb\t1f\n"