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[LV] Update floating-point induction test checks (NFC)
llvm-svn: 295885
This commit is contained in:
Matthew Simpson
parent
ce97f6bd94
commit
b55ec52af2
@ -3,43 +3,6 @@
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; RUN: opt < %s -loop-vectorize -force-vector-interleave=2 -force-vector-width=1 -dce -instcombine -S | FileCheck --check-prefix VEC1_INTERL2 %s
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; RUN: opt < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=2 -dce -simplifycfg -instcombine -S | FileCheck --check-prefix VEC2_INTERL1_PRED_STORE %s
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; VEC4_INTERL1-LABEL: @fp_iv_loop1(
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; VEC4_INTERL1: %[[FP_INC:.*]] = load float, float* @fp_inc
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; VEC4_INTERL1: vector.body:
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; VEC4_INTERL1: %[[FP_INDEX:.*]] = sitofp i64 {{.*}} to float
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; VEC4_INTERL1: %[[VEC_INCR:.*]] = fmul fast float {{.*}}, %[[FP_INDEX]]
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; VEC4_INTERL1: %[[FP_OFFSET_IDX:.*]] = fsub fast float %init, %[[VEC_INCR]]
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; VEC4_INTERL1: %[[BRCT_INSERT:.*]] = insertelement <4 x float> undef, float %[[FP_OFFSET_IDX]], i32 0
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; VEC4_INTERL1-NEXT: %[[BRCT_SPLAT:.*]] = shufflevector <4 x float> %[[BRCT_INSERT]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1: %[[BRCT_INSERT:.*]] = insertelement {{.*}} %[[FP_INC]]
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; VEC4_INTERL1-NEXT: %[[FP_INC_BCST:.*]] = shufflevector <4 x float> %[[BRCT_INSERT]], {{.*}} zeroinitializer
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; VEC4_INTERL1: %[[VSTEP:.*]] = fmul fast <4 x float> %[[FP_INC_BCST]], <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>
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; VEC4_INTERL1-NEXT: %[[VEC_INDUCTION:.*]] = fsub fast <4 x float> %[[BRCT_SPLAT]], %[[VSTEP]]
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; VEC4_INTERL1: store <4 x float> %[[VEC_INDUCTION]]
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; VEC4_INTERL2-LABEL: @fp_iv_loop1(
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; VEC4_INTERL2: %[[FP_INC:.*]] = load float, float* @fp_inc
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; VEC4_INTERL2: vector.body:
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; VEC4_INTERL2: %[[INDEX:.*]] = sitofp i64 {{.*}} to float
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; VEC4_INTERL2: %[[VEC_INCR:.*]] = fmul fast float %{{.*}}, %[[INDEX]]
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; VEC4_INTERL2: fsub fast float %init, %[[VEC_INCR]]
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; VEC4_INTERL2: %[[VSTEP1:.*]] = fmul fast <4 x float> %{{.*}}, <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>
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; VEC4_INTERL2-NEXT: %[[VEC_INDUCTION1:.*]] = fsub fast <4 x float> {{.*}}, %[[VSTEP1]]
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; VEC4_INTERL2: %[[VSTEP2:.*]] = fmul fast <4 x float> %{{.*}}, <float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00>
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; VEC4_INTERL2-NEXT: %[[VEC_INDUCTION2:.*]] = fsub fast <4 x float> {{.*}}, %[[VSTEP2]]
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; VEC4_INTERL2: store <4 x float> %[[VEC_INDUCTION1]]
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; VEC4_INTERL2: store <4 x float> %[[VEC_INDUCTION2]]
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; VEC1_INTERL2-LABEL: @fp_iv_loop1(
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; VEC1_INTERL2: %[[FP_INC:.*]] = load float, float* @fp_inc
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; VEC1_INTERL2: vector.body:
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; VEC1_INTERL2: %[[INDEX:.*]] = sitofp i64 {{.*}} to float
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; VEC1_INTERL2: %[[STEP:.*]] = fmul fast float %{{.*}}, %[[INDEX]]
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; VEC1_INTERL2: %[[FP_OFFSET_IDX:.*]] = fsub fast float %init, %[[STEP]]
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; VEC1_INTERL2: %[[SCALAR_INDUCTION2:.*]] = fsub fast float %[[FP_OFFSET_IDX]], %[[FP_INC]]
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; VEC1_INTERL2: store float %[[FP_OFFSET_IDX]]
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; VEC1_INTERL2: store float %[[SCALAR_INDUCTION2]]
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@fp_inc = common global float 0.000000e+00, align 4
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;void fp_iv_loop1(float init, float * __restrict__ A, int N) {
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@ -50,6 +13,68 @@
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; }
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;}
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; VEC4_INTERL1-LABEL: @fp_iv_loop1(
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; VEC4_INTERL1: vector.ph:
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; VEC4_INTERL1-NEXT: br label %vector.body
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; VEC4_INTERL1: vector.body:
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; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast float %fpinc, [[TMP5]]
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; VEC4_INTERL1-NEXT: [[FP_OFFSET_IDX:%.*]] = fsub fast float %init, [[TMP6]]
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> undef, float [[FP_OFFSET_IDX]], i32 0
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> undef, float %fpinc, i32 0
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; VEC4_INTERL1-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = fmul fast <4 x float> [[DOTSPLAT]], <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>
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; VEC4_INTERL1-NEXT: [[INDUCTION5:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT4]], [[TMP7]]
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; VEC4_INTERL1-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDEX]]
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; VEC4_INTERL1-NEXT: [[TMP9:%.*]] = bitcast float* [[TMP8]] to <4 x float>*
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; VEC4_INTERL1-NEXT: store <4 x float> [[INDUCTION5]], <4 x float>* [[TMP9]], align 4
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; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
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; VEC4_INTERL1: br i1 {{.*}}, label %middle.block, label %vector.body
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; VEC4_INTERL2-LABEL: @fp_iv_loop1(
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; VEC4_INTERL2: vector.ph:
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; VEC4_INTERL2-NEXT: br label %vector.body
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; VEC4_INTERL2: vector.body:
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; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fmul fast float %fpinc, [[TMP5]]
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; VEC4_INTERL2-NEXT: [[FP_OFFSET_IDX:%.*]] = fsub fast float %init, [[TMP6]]
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; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <4 x float> undef, float [[FP_OFFSET_IDX]], i32 0
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; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT4]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL2-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> undef, float %fpinc, i32 0
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; VEC4_INTERL2-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = fmul fast <4 x float> [[DOTSPLAT]], <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>
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; VEC4_INTERL2-NEXT: [[INDUCTION6:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT5]], [[TMP7]]
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; VEC4_INTERL2-NEXT: [[TMP8:%.*]] = fmul fast <4 x float> [[DOTSPLAT]], <float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00>
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; VEC4_INTERL2-NEXT: [[INDUCTION9:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT5]], [[TMP8]]
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; VEC4_INTERL2-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDEX]]
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; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = bitcast float* [[TMP9]] to <4 x float>*
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; VEC4_INTERL2-NEXT: store <4 x float> [[INDUCTION6]], <4 x float>* [[TMP10]], align 4
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; VEC4_INTERL2-NEXT: [[TMP11:%.*]] = getelementptr float, float* [[TMP9]], i64 4
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; VEC4_INTERL2-NEXT: [[TMP12:%.*]] = bitcast float* [[TMP11]] to <4 x float>*
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; VEC4_INTERL2-NEXT: store <4 x float> [[INDUCTION9]], <4 x float>* [[TMP12]], align 4
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; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 8
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; VEC4_INTERL2: br i1 {{.*}}, label %middle.block, label %vector.body
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; VEC1_INTERL2-LABEL: @fp_iv_loop1(
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; VEC1_INTERL2: vector.ph:
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; VEC1_INTERL2-NEXT: br label %vector.body
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; VEC1_INTERL2: vector.body:
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; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; VEC1_INTERL2-NEXT: [[INDUCTION2:%.*]] = or i64 [[INDEX]], 1
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; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = fmul fast float %fpinc, [[TMP6]]
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; VEC1_INTERL2-NEXT: [[FP_OFFSET_IDX:%.*]] = fsub fast float %init, [[TMP7]]
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; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = fsub fast float [[FP_OFFSET_IDX]], %fpinc
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; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDEX]]
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; VEC1_INTERL2-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDUCTION2]]
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; VEC1_INTERL2-NEXT: store float [[FP_OFFSET_IDX]], float* [[TMP9]], align 4
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; VEC1_INTERL2-NEXT: store float [[TMP8]], float* [[TMP10]], align 4
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; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 2
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; VEC1_INTERL2: br i1 {{.*}}, label %middle.block, label %vector.body
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define void @fp_iv_loop1(float %init, float* noalias nocapture %A, i32 %N) #1 {
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entry:
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%cmp4 = icmp sgt i32 %N, 0
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@ -86,15 +111,21 @@ for.end: ; preds = %for.end.loopexit, %
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;}
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; VEC4_INTERL1-LABEL: @fp_iv_loop2(
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; VEC4_INTERL1: vector.body
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; VEC4_INTERL1: %[[index:.*]] = phi i64 [ 0, %vector.ph ]
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; VEC4_INTERL1: sitofp i64 %[[index]] to float
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; VEC4_INTERL1: %[[VAR1:.*]] = fmul fast float {{.*}}, 5.000000e-01
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; VEC4_INTERL1: %[[VAR2:.*]] = fadd fast float %[[VAR1]]
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; VEC4_INTERL1: insertelement <4 x float> undef, float %[[VAR2]], i32 0
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; VEC4_INTERL1: shufflevector <4 x float> {{.*}}, <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1: fadd fast <4 x float> {{.*}}, <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float 1.500000e+00>
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; VEC4_INTERL1: store <4 x float>
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; VEC4_INTERL1: vector.ph:
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; VEC4_INTERL1-NEXT: br label %vector.body
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; VEC4_INTERL1: vector.body:
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; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast float [[TMP5]], 5.000000e-01
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; VEC4_INTERL1-NEXT: [[FP_OFFSET_IDX:%.*]] = fadd fast float [[TMP6]], %init
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> undef, float [[FP_OFFSET_IDX]], i32 0
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: [[INDUCTION5:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT4]], <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float 1.500000e+00>
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; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDEX]]
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; VEC4_INTERL1-NEXT: [[TMP8:%.*]] = bitcast float* [[TMP7]] to <4 x float>*
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; VEC4_INTERL1-NEXT: store <4 x float> [[INDUCTION5]], <4 x float>* [[TMP8]], align 4
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; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
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; VEC4_INTERL1: br i1 {{.*}}, label %middle.block, label %vector.body
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define void @fp_iv_loop2(float %init, float* noalias nocapture %A, i32 %N) #0 {
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entry:
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@ -134,14 +165,44 @@ for.end: ; preds = %for.end.loopexit, %
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; C[i] = y;
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; }
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;}
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; VEC4_INTERL1-LABEL: @fp_iv_loop3(
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; VEC4_INTERL1: vector.body
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; VEC4_INTERL1: %[[index:.*]] = phi i64 [ 0, %vector.ph ]
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; VEC4_INTERL1: sitofp i64 %[[index]] to float
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; VEC4_INTERL1: %[[VAR1:.*]] = fmul fast float {{.*}}, -5.000000e-01
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; VEC4_INTERL1: fadd fast float %[[VAR1]]
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; VEC4_INTERL1: fadd fast <4 x float> {{.*}}, <float -5.000000e-01, float -1.000000e+00, float -1.500000e+00, float -2.000000e+00>
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; VEC4_INTERL1: store <4 x float>
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; VEC4_INTERL1: for.body.lr.ph:
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; VEC4_INTERL1: [[TMP0:%.*]] = load float, float* @fp_inc, align 4
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; VEC4_INTERL1: vector.ph:
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT14]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: br label %vector.body
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; VEC4_INTERL1: vector.body:
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; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC4_INTERL1-NEXT: [[TMP8:%.*]] = fmul fast float [[TMP7]], -5.000000e-01
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; VEC4_INTERL1-NEXT: [[FP_OFFSET_IDX:%.*]] = fadd fast float [[TMP8]], 0x3FB99999A0000000
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x float> undef, float [[FP_OFFSET_IDX]], i32 0
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT6]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: [[TMP9:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = fmul fast float [[TMP0]], [[TMP9]]
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; VEC4_INTERL1-NEXT: [[FP_OFFSET_IDX10:%.*]] = fadd fast float [[TMP10]], %init
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT11:%.*]] = insertelement <4 x float> undef, float [[FP_OFFSET_IDX10]], i32 0
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT12:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT11]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0
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; VEC4_INTERL1-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> undef, <4 x i32> zeroinitializer
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; VEC4_INTERL1-NEXT: [[TMP11:%.*]] = fmul fast <4 x float> [[DOTSPLAT]], <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>
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; VEC4_INTERL1-NEXT: [[INDUCTION13:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT12]], [[TMP11]]
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; VEC4_INTERL1-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDEX]]
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; VEC4_INTERL1-NEXT: [[TMP13:%.*]] = bitcast float* [[TMP12]] to <4 x float>*
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; VEC4_INTERL1-NEXT: store <4 x float> [[INDUCTION13]], <4 x float>* [[TMP13]], align 4
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; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = fadd fast <4 x float> [[INDUCTION13]], [[BROADCAST_SPLAT15]]
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; VEC4_INTERL1-NEXT: [[TMP15:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT7]], <float -5.000000e-01, float -1.000000e+00, float -1.500000e+00, float -2.000000e+00>
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; VEC4_INTERL1-NEXT: [[TMP16:%.*]] = fadd fast <4 x float> [[TMP15]], [[TMP14]]
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; VEC4_INTERL1-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, float* %B, i64 [[INDEX]]
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; VEC4_INTERL1-NEXT: [[TMP18:%.*]] = bitcast float* [[TMP17]] to <4 x float>*
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; VEC4_INTERL1-NEXT: store <4 x float> [[TMP16]], <4 x float>* [[TMP18]], align 4
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; VEC4_INTERL1-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, float* %C, i64 [[INDEX]]
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; VEC4_INTERL1-NEXT: [[TMP20:%.*]] = bitcast float* [[TMP19]] to <4 x float>*
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; VEC4_INTERL1-NEXT: store <4 x float> [[TMP15]], <4 x float>* [[TMP20]], align 4
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; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
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; VEC4_INTERL1: br i1 {{.*}}, label %middle.block, label %vector.body
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define void @fp_iv_loop3(float %init, float* noalias nocapture %A, float* noalias nocapture %B, float* noalias nocapture %C, i32 %N) #1 {
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entry:
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@ -187,10 +248,21 @@ for.end:
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;}
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; VEC4_INTERL1-LABEL: @fp_iv_loop4(
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; VEC4_INTERL1: vector.body
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; VEC4_INTERL1-NOT: fmul fast <4 x float>
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; VEC4_INTERL1: %[[induction:.*]] = fadd fast <4 x float> %{{.*}}, <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float 1.500000e+00>
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; VEC4_INTERL1: store <4 x float> %[[induction]]
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; VEC4_INTERL1: vector.ph:
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; VEC4_INTERL1-NEXT: br label %vector.body
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; VEC4_INTERL1: vector.body:
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; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = sitofp i64 [[INDEX]] to float
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; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast float [[TMP5]], 5.000000e-01
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; VEC4_INTERL1-NEXT: [[FP_OFFSET_IDX:%.*]] = fadd fast float [[TMP6]], 1.000000e+00
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> undef, float [[FP_OFFSET_IDX]], i32 0
|
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; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> undef, <4 x i32> zeroinitializer
|
||||
; VEC4_INTERL1-NEXT: [[INDUCTION5:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT4]], <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float 1.500000e+00>
|
||||
; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, float* %A, i64 [[INDEX]]
|
||||
; VEC4_INTERL1-NEXT: [[TMP8:%.*]] = bitcast float* [[TMP7]] to <4 x float>*
|
||||
; VEC4_INTERL1-NEXT: store <4 x float> [[INDUCTION5]], <4 x float>* [[TMP8]], align 4
|
||||
; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
|
||||
; VEC4_INTERL1: br i1 {{.*}}, label %middle.block, label %vector.body
|
||||
|
||||
define void @fp_iv_loop4(float* noalias nocapture %A, i32 %N) {
|
||||
entry:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user