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llvm-svn: 157020
This commit is contained in:
Andrew Trick 2012-05-17 22:37:09 +00:00
parent 9747fd81e3
commit b57d7deff8
1 changed files with 3 additions and 2 deletions
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lib/CodeGen/MachineScheduler.cpp
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@ -1,4 +1,4 @@
//===- MachineScheduler.cpp - Machine Instruction Scheduler ---------------===//excess //===- MachineScheduler.cpp - Machine Instruction Scheduler ---------------===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -808,7 +808,8 @@ traceCandidate(const char *Label, unsigned QID, SUnit *SU,
} }
#endif #endif
/// Return true if the LHS reg pressure effect is better than RHS. /// pickNodeFromQueue helper that returns true if the LHS reg pressure effect is
/// more desirable than RHS from scheduling standpoint.
static bool compareRPDelta(const RegPressureDelta &LHS, static bool compareRPDelta(const RegPressureDelta &LHS,
const RegPressureDelta &RHS) { const RegPressureDelta &RHS) {
// Compare each component of pressure in decreasing order of importance // Compare each component of pressure in decreasing order of importance