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Fix X86FastISel's output for x86-32 PIC constant pool addresses.
llvm-svn: 56829
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@ -1217,9 +1217,18 @@ unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
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Align = Log2_64(Align);
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}
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// x86-32 PIC requires a PIC base register for constant pools.
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unsigned PICBase = 0;
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if (TM.getRelocationModel() == Reloc::PIC_ &&
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!Subtarget->is64Bit())
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PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
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// Create the load from the constant pool.
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unsigned MCPOffset = MCP.getConstantPoolIndex(C, Align);
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unsigned ResultReg = createResultReg(RC);
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addConstantPoolReference(BuildMI(MBB, TII.get(Opc), ResultReg), MCPOffset);
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addConstantPoolReference(BuildMI(MBB, TII.get(Opc), ResultReg), MCPOffset,
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PICBase);
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return ResultReg;
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}
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@ -114,13 +114,15 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
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/// addConstantPoolReference - This function is used to add a reference to the
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/// base of a constant value spilled to the per-function constant pool. The
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/// reference has base register ConstantPoolIndex offset which is retained until
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/// either machine code emission or assembly output. This allows an optional
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/// offset to be added as well.
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/// reference uses the abstract ConstantPoolIndex which is retained until
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/// either machine code emission or assembly output. In PIC mode on x86-32,
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/// the GlobalBaseReg parameter can be used to make this a
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/// GlobalBaseReg-relative reference.
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///
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inline const MachineInstrBuilder &
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addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI) {
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return MIB.addReg(0).addImm(1).addReg(0).addConstantPoolIndex(CPI);
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addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
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unsigned GlobalBaseReg = 0) {
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return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0).addConstantPoolIndex(CPI);
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}
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} // End llvm namespace
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