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https://github.com/RPCS3/llvm-mirror.git
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Add a bunch of OpSize32 tags to 64-bit mode only instructions to match their 32-bit mode counterparts for cases where there is also a OpSize16 instruction.
llvm-svn: 201550
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8091d0ad88
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@ -22,11 +22,11 @@
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let isTerminator = 1, isReturn = 1, isBarrier = 1,
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hasCtrlDep = 1, FPForm = SpecialFP, SchedRW = [WriteJumpLd] in {
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def RETL : I <0xC3, RawFrm, (outs), (ins variable_ops),
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"ret{l}",
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[(X86retflag 0)], IIC_RET>, OpSize32, Requires<[Not64BitMode]>;
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"ret{l}", [(X86retflag 0)], IIC_RET>, OpSize32,
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Requires<[Not64BitMode]>;
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def RETQ : I <0xC3, RawFrm, (outs), (ins variable_ops),
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"ret{q}",
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[(X86retflag 0)], IIC_RET>, Requires<[In64BitMode]>;
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"ret{q}", [(X86retflag 0)], IIC_RET>, OpSize32,
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Requires<[In64BitMode]>;
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def RETW : I <0xC3, RawFrm, (outs), (ins),
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"ret{w}",
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[], IIC_RET>, OpSize16;
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@ -36,7 +36,7 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1,
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Requires<[Not64BitMode]>;
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def RETIQ : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
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"ret{q}\t$amt",
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[(X86retflag timm:$amt)], IIC_RET_IMM>,
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[(X86retflag timm:$amt)], IIC_RET_IMM>, OpSize32,
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Requires<[In64BitMode]>;
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def RETIW : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt),
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"ret{w}\t$amt",
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@ -265,7 +265,7 @@ let isCall = 1, Uses = [RSP], SchedRW = [WriteJump] in {
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// the 32-bit pcrel field that we have.
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def CALL64pcrel32 : Ii32PCRel<0xE8, RawFrm,
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(outs), (ins i64i32imm_pcrel:$dst),
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"call{q}\t$dst", [], IIC_CALL_RI>,
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"call{q}\t$dst", [], IIC_CALL_RI>, OpSize32,
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Requires<[In64BitMode]>;
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def CALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst),
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"call{q}\t{*}$dst", [(X86call GR64:$dst)],
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@ -968,7 +968,7 @@ def POP16rmm: I<0x8F, MRM0m, (outs), (ins i16mem:$dst), "pop{w}\t$dst", [],
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def POP32rmr: I<0x8F, MRM0r, (outs GR32:$reg), (ins), "pop{l}\t$reg", [],
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IIC_POP_REG>, OpSize32, Requires<[Not64BitMode]>;
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def POP32rmm: I<0x8F, MRM0m, (outs), (ins i32mem:$dst), "pop{l}\t$dst", [],
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IIC_POP_MEM>, Requires<[Not64BitMode]>;
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IIC_POP_MEM>, OpSize32, Requires<[Not64BitMode]>;
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def POPF16 : I<0x9D, RawFrm, (outs), (ins), "popf{w}", [], IIC_POP_F>,
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OpSize16;
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@ -1014,19 +1014,19 @@ def PUSHF32 : I<0x9C, RawFrm, (outs), (ins), "pushf{l|d}", [], IIC_PUSH_F>,
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let Defs = [RSP], Uses = [RSP], neverHasSideEffects=1 in {
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let mayLoad = 1, SchedRW = [WriteLoad] in {
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def POP64r : I<0x58, AddRegFrm, (outs GR64:$reg), (ins), "pop{q}\t$reg", [],
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IIC_POP_REG>, Requires<[In64BitMode]>;
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IIC_POP_REG>, OpSize32, Requires<[In64BitMode]>;
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def POP64rmr: I<0x8F, MRM0r, (outs GR64:$reg), (ins), "pop{q}\t$reg", [],
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IIC_POP_REG>, Requires<[In64BitMode]>;
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IIC_POP_REG>, OpSize32, Requires<[In64BitMode]>;
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def POP64rmm: I<0x8F, MRM0m, (outs), (ins i64mem:$dst), "pop{q}\t$dst", [],
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IIC_POP_MEM>, Requires<[In64BitMode]>;
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IIC_POP_MEM>, OpSize32, Requires<[In64BitMode]>;
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} // mayLoad, SchedRW
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let mayStore = 1, SchedRW = [WriteStore] in {
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def PUSH64r : I<0x50, AddRegFrm, (outs), (ins GR64:$reg), "push{q}\t$reg", [],
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IIC_PUSH_REG>, Requires<[In64BitMode]>;
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IIC_PUSH_REG>, OpSize32, Requires<[In64BitMode]>;
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def PUSH64rmr: I<0xFF, MRM6r, (outs), (ins GR64:$reg), "push{q}\t$reg", [],
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IIC_PUSH_REG>, Requires<[In64BitMode]>;
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IIC_PUSH_REG>, OpSize32, Requires<[In64BitMode]>;
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def PUSH64rmm: I<0xFF, MRM6m, (outs), (ins i64mem:$src), "push{q}\t$src", [],
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IIC_PUSH_MEM>, Requires<[In64BitMode]>;
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IIC_PUSH_MEM>, OpSize32, Requires<[In64BitMode]>;
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} // mayStore, SchedRW
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}
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@ -1038,15 +1038,16 @@ def PUSH64i16 : Ii16<0x68, RawFrm, (outs), (ins i16imm:$imm),
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"push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16,
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Requires<[In64BitMode]>;
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def PUSH64i32 : Ii32S<0x68, RawFrm, (outs), (ins i64i32imm:$imm),
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"push{q}\t$imm", [], IIC_PUSH_IMM>, Requires<[In64BitMode]>;
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"push{q}\t$imm", [], IIC_PUSH_IMM>, OpSize32,
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Requires<[In64BitMode]>;
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}
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let Defs = [RSP, EFLAGS], Uses = [RSP], mayLoad = 1, neverHasSideEffects=1 in
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def POPF64 : I<0x9D, RawFrm, (outs), (ins), "popfq", [], IIC_POP_FD>,
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Requires<[In64BitMode]>, Sched<[WriteLoad]>;
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OpSize32, Requires<[In64BitMode]>, Sched<[WriteLoad]>;
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let Defs = [RSP], Uses = [RSP, EFLAGS], mayStore = 1, neverHasSideEffects=1 in
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def PUSHF64 : I<0x9C, RawFrm, (outs), (ins), "pushfq", [], IIC_PUSH_F>,
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Requires<[In64BitMode]>, Sched<[WriteStore]>;
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OpSize32, Requires<[In64BitMode]>, Sched<[WriteStore]>;
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let Defs = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], Uses = [ESP],
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mayLoad = 1, neverHasSideEffects = 1, SchedRW = [WriteLoad] in {
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@ -1672,7 +1673,7 @@ def XCHG32ar : I<0x90, AddRegFrm, (outs), (ins GR32:$src),
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// xchg %eax, %eax needs to clear upper 32-bits of RAX so is not a NOP.
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def XCHG32ar64 : I<0x90, AddRegFrm, (outs), (ins GR32_NOAX:$src),
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"xchg{l}\t{$src, %eax|eax, $src}", [], IIC_XCHG_REG>,
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Requires<[In64BitMode]>;
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OpSize32, Requires<[In64BitMode]>;
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def XCHG64ar : RI<0x90, AddRegFrm, (outs), (ins GR64:$src),
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"xchg{q}\t{$src, %rax|rax, $src}", [], IIC_XCHG_REG>;
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} // SchedRW
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@ -6756,8 +6756,7 @@ let Defs = [EFLAGS], Predicates = [HasPOPCNT] in {
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def POPCNT16rr : I<0xB8, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
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"popcnt{w}\t{$src, $dst|$dst, $src}",
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[(set GR16:$dst, (ctpop GR16:$src)), (implicit EFLAGS)],
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IIC_SSE_POPCNT_RR>,
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OpSize16, XS;
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IIC_SSE_POPCNT_RR>, OpSize16, XS;
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def POPCNT16rm : I<0xB8, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
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"popcnt{w}\t{$src, $dst|$dst, $src}",
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[(set GR16:$dst, (ctpop (loadi16 addr:$src))),
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@ -6766,12 +6765,11 @@ let Defs = [EFLAGS], Predicates = [HasPOPCNT] in {
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def POPCNT32rr : I<0xB8, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
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"popcnt{l}\t{$src, $dst|$dst, $src}",
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[(set GR32:$dst, (ctpop GR32:$src)), (implicit EFLAGS)],
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IIC_SSE_POPCNT_RR>,
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XS;
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IIC_SSE_POPCNT_RR>, OpSize32, XS;
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def POPCNT32rm : I<0xB8, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
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"popcnt{l}\t{$src, $dst|$dst, $src}",
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[(set GR32:$dst, (ctpop (loadi32 addr:$src))),
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(implicit EFLAGS)], IIC_SSE_POPCNT_RM>, XS;
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(implicit EFLAGS)], IIC_SSE_POPCNT_RM>, OpSize32, XS;
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def POPCNT64rr : RI<0xB8, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
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"popcnt{q}\t{$src, $dst|$dst, $src}",
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@ -302,9 +302,11 @@ def PUSHGS32 : I<0xa8, RawFrm, (outs), (ins),
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"push{l}\t{%gs|gs}", [], IIC_PUSH_SR>, TB,
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OpSize32, Requires<[Not64BitMode]>;
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def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins),
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"push{q}\t{%fs|fs}", [], IIC_PUSH_SR>, TB, Requires<[In64BitMode]>;
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"push{q}\t{%fs|fs}", [], IIC_PUSH_SR>, TB,
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OpSize32, Requires<[In64BitMode]>;
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def PUSHGS64 : I<0xa8, RawFrm, (outs), (ins),
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"push{q}\t{%gs|gs}", [], IIC_PUSH_SR>, TB, Requires<[In64BitMode]>;
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"push{q}\t{%gs|gs}", [], IIC_PUSH_SR>, TB,
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OpSize32, Requires<[In64BitMode]>;
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// No "pop cs" instruction.
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def POPSS16 : I<0x17, RawFrm, (outs), (ins),
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@ -334,16 +336,18 @@ def POPFS32 : I<0xa1, RawFrm, (outs), (ins),
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"pop{l}\t{%fs|fs}", [], IIC_POP_SR>, TB,
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OpSize32, Requires<[Not64BitMode]>;
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def POPFS64 : I<0xa1, RawFrm, (outs), (ins),
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"pop{q}\t{%fs|fs}", [], IIC_POP_SR>, TB, Requires<[In64BitMode]>;
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"pop{q}\t{%fs|fs}", [], IIC_POP_SR>, TB,
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OpSize32, Requires<[In64BitMode]>;
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def POPGS16 : I<0xa9, RawFrm, (outs), (ins),
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"pop{w}\t{%gs|gs}", [], IIC_POP_SR>, OpSize16, TB;
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def POPGS32 : I<0xa9, RawFrm, (outs), (ins),
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"pop{l}\t{%gs|gs}", [], IIC_POP_SR>, TB,
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OpSize32, Requires<[Not64BitMode]>;
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def POPGS64 : I<0xa9, RawFrm, (outs), (ins),
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"pop{q}\t{%gs|gs}", [], IIC_POP_SR>, TB, Requires<[In64BitMode]>;
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"pop{q}\t{%gs|gs}", [], IIC_POP_SR>, TB,
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OpSize32, Requires<[In64BitMode]>;
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def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
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"lds{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16;
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