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GlobalISel: account for differing exception selector sizes.

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For some reason the exception selector register must be a pointer (that's
assumed by SDag); on the other hand, it gets moved into an IR-level type which
might be entirely different (i32 on AArch64). IRTranslator needs to be aware of
this.

llvm-svn: 293546
This commit is contained in:
Tim Northover 2017-01-30 20:52:42 +00:00
parent a4f8ce1645
commit b663bb327a
3 changed files with 14 additions and 3 deletions
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11
lib/CodeGen/GlobalISel/IRTranslator.cpp
View File

@ -801,8 +801,17 @@ bool IRTranslator::translateLandingPad(const User &U,
if (unsigned Reg = TLI.getExceptionSelectorRegister(PersonalityFn)) {
MBB.addLiveIn(Reg);
// N.b. the exception selector register always has pointer type and may not
// match the actual IR-level type in the landingpad so an extra cast is
// needed.
unsigned PtrVReg = MRI->createGenericVirtualRegister(Tys[0]);
MIRBuilder.buildCopy(PtrVReg, Reg);
unsigned VReg = MRI->createGenericVirtualRegister(Tys[1]);
MIRBuilder.buildCopy(VReg, Reg);
MIRBuilder.buildInstr(TargetOpcode::G_PTRTOINT)
.addDef(VReg)
.addUse(PtrVReg);
Regs.push_back(VReg);
Offsets.push_back(Tys[0].getSizeInBits());
}

3
test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
View File

@ -19,7 +19,8 @@ declare i32 @llvm.eh.typeid.for(i8*)
; CHECK: [[BAD]] (landing-pad):
; CHECK: EH_LABEL
; CHECK: [[PTR:%[0-9]+]](p0) = COPY %x0
; CHECK: [[SEL:%[0-9]+]](s32) = COPY %x1
; CHECK: [[SEL_PTR:%[0-9]+]](p0) = COPY %x1
; CHECK: [[SEL:%[0-9]+]](s32) = G_PTRTOINT [[SEL_PTR]]
; CHECK: [[PTR_SEL:%[0-9]+]](s128) = G_SEQUENCE [[PTR]](p0), 0, [[SEL]](s32), 64
; CHECK: [[PTR_RET:%[0-9]+]](s64), [[SEL_RET:%[0-9]+]](s32) = G_EXTRACT [[PTR_SEL]](s128), 0, 64
; CHECK: %x0 = COPY [[PTR_RET]]

3
test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
View File

@ -15,7 +15,8 @@ declare void @_Unwind_Resume(i8*)
; CHECK: [[LP]] (landing-pad):
; CHECK: EH_LABEL
; CHECK: [[PTR:%[0-9]+]](p0) = COPY %x0
; CHECK: [[SEL:%[0-9]+]](s32) = COPY %x1
; CHECK: [[SEL_PTR:%[0-9]+]](p0) = COPY %x1
; CHECK: [[SEL:%[0-9]+]](s32) = G_PTRTOINT [[SEL_PTR]]
; CHECK-NOT: G_SEQUENCE
; CHECK-NOT: G_EXTRACT
; CHECK: G_STORE [[PTR]](p0), {{%[0-9]+}}(p0)