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[update_llc_test_checks] Support AVR
Reviewed By: arichardson Differential Revision: https://reviews.llvm.org/D95240
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@ -1,40 +1,49 @@
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; RUN: llc < %s -march=avr | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=avr | FileCheck %s
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define i8 @com8(i8 %x) {
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; CHECK-LABEL: com8:
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; CHECK: com r24
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; CHECK: ; %bb.0:
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; CHECK-NEXT: com r24
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; CHECK-NEXT: ret
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%neg = xor i8 %x, -1
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ret i8 %neg
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}
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define i16 @com16(i16 %x) {
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; CHECK-LABEL: com16:
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; CHECK: com r24
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; CHECK: com r25
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; CHECK: ; %bb.0:
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; CHECK-NEXT: com r24
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; CHECK-NEXT: com r25
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; CHECK-NEXT: ret
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%neg = xor i16 %x, -1
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ret i16 %neg
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}
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define i32 @com32(i32 %x) {
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; CHECK-LABEL: com32:
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; CHECK: com r22
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; CHECK: com r23
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; CHECK: com r24
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; CHECK: com r25
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; CHECK: ; %bb.0:
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; CHECK-NEXT: com r22
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; CHECK-NEXT: com r23
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; CHECK-NEXT: com r24
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; CHECK-NEXT: com r25
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; CHECK-NEXT: ret
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%neg = xor i32 %x, -1
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ret i32 %neg
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}
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define i64 @com64(i64 %x) {
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; CHECK-LABEL: com64:
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; CHECK: com r18
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; CHECK: com r19
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; CHECK: com r20
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; CHECK: com r21
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; CHECK: com r22
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; CHECK: com r23
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; CHECK: com r24
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; CHECK: com r25
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; CHECK: ; %bb.0:
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; CHECK-NEXT: com r18
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; CHECK-NEXT: com r19
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; CHECK-NEXT: com r20
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; CHECK-NEXT: com r21
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; CHECK-NEXT: com r22
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; CHECK-NEXT: com r23
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; CHECK-NEXT: com r24
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; CHECK-NEXT: com r25
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; CHECK-NEXT: ret
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%neg = xor i64 %x, -1
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ret i64 %neg
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}
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@ -1,18 +1,22 @@
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; RUN: llc < %s -march=avr | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=avr | FileCheck %s
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define i8 @neg8(i8 %x) {
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; CHECK-LABEL: neg8:
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; CHECK: neg r24
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; CHECK: ; %bb.0:
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; CHECK-NEXT: neg r24
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; CHECK-NEXT: ret
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%sub = sub i8 0, %x
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ret i8 %sub
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}
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define i16 @neg16(i16 %x) {
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; CHECK-LABEL: neg16:
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; CHECK: neg r25
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; CHECK-next: neg r24
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; CHECK-next: sbci r25, 0
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; CHECK-next: ret
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; CHECK: ; %bb.0:
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; CHECK-NEXT: neg r25
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; CHECK-NEXT: neg r24
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; CHECK-NEXT: sbci r25, 0
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; CHECK-NEXT: ret
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%sub = sub i16 0, %x
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ret i16 %sub
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}
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@ -0,0 +1,8 @@
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; Check that we accept functions with '$' in the name.
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; RUN: llc -mtriple=avr < %s | FileCheck %s
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define hidden i8 @"_Z54bar$ompvariant$bar"() {
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entry:
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ret i8 2
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}
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@ -0,0 +1,13 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Check that we accept functions with '$' in the name.
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; RUN: llc -mtriple=avr < %s | FileCheck %s
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define hidden i8 @"_Z54bar$ompvariant$bar"() {
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; CHECK-LABEL: _Z54bar$ompvariant$bar:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: ldi r24, 2
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; CHECK-NEXT: ret
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entry:
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ret i8 2
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}
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@ -0,0 +1,5 @@
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# REQUIRES: avr-registered-target
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## Check that functions names with '$' are processed correctly
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# RUN: cp -f %S/Inputs/avr_function_name.ll %t.ll && %update_llc_test_checks %t.ll
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# RUN: diff -u %S/Inputs/avr_function_name.ll.expected %t.ll
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@ -67,6 +67,12 @@ ASM_FUNCTION_MSP430_RE = re.compile(
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r'(\$|\.L)func_end[0-9]+:\n', # $func_end0:
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flags=(re.M | re.S))
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ASM_FUNCTION_AVR_RE = re.compile(
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r'^_?(?P<func>[^:]+):[ \t]*;+[ \t]*@"?(?P=func)"?\n[^:]*?'
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r'(?P<body>.*?)\n'
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r'.Lfunc_end[0-9]+:\n',
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flags=(re.M | re.S))
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ASM_FUNCTION_PPC_RE = re.compile(
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r'#[ \-\t]*Begin function (?P<func>[^.:]+)\n'
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r'.*?'
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@ -261,6 +267,16 @@ def scrub_asm_msp430(asm, args):
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asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
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return asm
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def scrub_asm_avr(asm, args):
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# Scrub runs of whitespace out of the assembly, but leave the leading
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# whitespace in place.
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asm = common.SCRUB_WHITESPACE_RE.sub(r' ', asm)
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# Expand the tabs used for indentation.
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asm = string.expandtabs(asm, 2)
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# Strip trailing whitespace.
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asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
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return asm
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def scrub_asm_riscv(asm, args):
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# Scrub runs of whitespace out of the assembly, but leave the leading
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# whitespace in place.
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@ -347,6 +363,7 @@ def get_run_handler(triple):
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'thumbv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_IOS_RE),
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'mips': (scrub_asm_mips, ASM_FUNCTION_MIPS_RE),
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'msp430': (scrub_asm_msp430, ASM_FUNCTION_MSP430_RE),
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'avr': (scrub_asm_avr, ASM_FUNCTION_AVR_RE),
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'ppc32': (scrub_asm_powerpc, ASM_FUNCTION_PPC_RE),
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'powerpc': (scrub_asm_powerpc, ASM_FUNCTION_PPC_RE),
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'riscv32': (scrub_asm_riscv, ASM_FUNCTION_RISCV_RE),
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