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[update_llc_test_checks] Support AVR

Reviewed By: arichardson

Differential Revision: https://reviews.llvm.org/D95240
This commit is contained in:
Ben Shi 2021-01-26 17:50:56 +08:00
parent 3f01c789e0
commit b6991ff67e
6 changed files with 78 additions and 22 deletions

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@ -1,40 +1,49 @@
; RUN: llc < %s -march=avr | FileCheck %s
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=avr | FileCheck %s
define i8 @com8(i8 %x) {
; CHECK-LABEL: com8:
; CHECK: com r24
; CHECK: ; %bb.0:
; CHECK-NEXT: com r24
; CHECK-NEXT: ret
%neg = xor i8 %x, -1
ret i8 %neg
}
define i16 @com16(i16 %x) {
; CHECK-LABEL: com16:
; CHECK: com r24
; CHECK: com r25
; CHECK: ; %bb.0:
; CHECK-NEXT: com r24
; CHECK-NEXT: com r25
; CHECK-NEXT: ret
%neg = xor i16 %x, -1
ret i16 %neg
}
define i32 @com32(i32 %x) {
; CHECK-LABEL: com32:
; CHECK: com r22
; CHECK: com r23
; CHECK: com r24
; CHECK: com r25
; CHECK: ; %bb.0:
; CHECK-NEXT: com r22
; CHECK-NEXT: com r23
; CHECK-NEXT: com r24
; CHECK-NEXT: com r25
; CHECK-NEXT: ret
%neg = xor i32 %x, -1
ret i32 %neg
}
define i64 @com64(i64 %x) {
; CHECK-LABEL: com64:
; CHECK: com r18
; CHECK: com r19
; CHECK: com r20
; CHECK: com r21
; CHECK: com r22
; CHECK: com r23
; CHECK: com r24
; CHECK: com r25
; CHECK: ; %bb.0:
; CHECK-NEXT: com r18
; CHECK-NEXT: com r19
; CHECK-NEXT: com r20
; CHECK-NEXT: com r21
; CHECK-NEXT: com r22
; CHECK-NEXT: com r23
; CHECK-NEXT: com r24
; CHECK-NEXT: com r25
; CHECK-NEXT: ret
%neg = xor i64 %x, -1
ret i64 %neg
}

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@ -1,18 +1,22 @@
; RUN: llc < %s -march=avr | FileCheck %s
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=avr | FileCheck %s
define i8 @neg8(i8 %x) {
; CHECK-LABEL: neg8:
; CHECK: neg r24
; CHECK: ; %bb.0:
; CHECK-NEXT: neg r24
; CHECK-NEXT: ret
%sub = sub i8 0, %x
ret i8 %sub
}
define i16 @neg16(i16 %x) {
; CHECK-LABEL: neg16:
; CHECK: neg r25
; CHECK-next: neg r24
; CHECK-next: sbci r25, 0
; CHECK-next: ret
; CHECK: ; %bb.0:
; CHECK-NEXT: neg r25
; CHECK-NEXT: neg r24
; CHECK-NEXT: sbci r25, 0
; CHECK-NEXT: ret
%sub = sub i16 0, %x
ret i16 %sub
}

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@ -0,0 +1,8 @@
; Check that we accept functions with '$' in the name.
; RUN: llc -mtriple=avr < %s | FileCheck %s
define hidden i8 @"_Z54bar$ompvariant$bar"() {
entry:
ret i8 2
}

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@ -0,0 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Check that we accept functions with '$' in the name.
; RUN: llc -mtriple=avr < %s | FileCheck %s
define hidden i8 @"_Z54bar$ompvariant$bar"() {
; CHECK-LABEL: _Z54bar$ompvariant$bar:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: ldi r24, 2
; CHECK-NEXT: ret
entry:
ret i8 2
}

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@ -0,0 +1,5 @@
# REQUIRES: avr-registered-target
## Check that functions names with '$' are processed correctly
# RUN: cp -f %S/Inputs/avr_function_name.ll %t.ll && %update_llc_test_checks %t.ll
# RUN: diff -u %S/Inputs/avr_function_name.ll.expected %t.ll

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@ -67,6 +67,12 @@ ASM_FUNCTION_MSP430_RE = re.compile(
r'(\$|\.L)func_end[0-9]+:\n', # $func_end0:
flags=(re.M | re.S))
ASM_FUNCTION_AVR_RE = re.compile(
r'^_?(?P<func>[^:]+):[ \t]*;+[ \t]*@"?(?P=func)"?\n[^:]*?'
r'(?P<body>.*?)\n'
r'.Lfunc_end[0-9]+:\n',
flags=(re.M | re.S))
ASM_FUNCTION_PPC_RE = re.compile(
r'#[ \-\t]*Begin function (?P<func>[^.:]+)\n'
r'.*?'
@ -261,6 +267,16 @@ def scrub_asm_msp430(asm, args):
asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
return asm
def scrub_asm_avr(asm, args):
# Scrub runs of whitespace out of the assembly, but leave the leading
# whitespace in place.
asm = common.SCRUB_WHITESPACE_RE.sub(r' ', asm)
# Expand the tabs used for indentation.
asm = string.expandtabs(asm, 2)
# Strip trailing whitespace.
asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
return asm
def scrub_asm_riscv(asm, args):
# Scrub runs of whitespace out of the assembly, but leave the leading
# whitespace in place.
@ -347,6 +363,7 @@ def get_run_handler(triple):
'thumbv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_IOS_RE),
'mips': (scrub_asm_mips, ASM_FUNCTION_MIPS_RE),
'msp430': (scrub_asm_msp430, ASM_FUNCTION_MSP430_RE),
'avr': (scrub_asm_avr, ASM_FUNCTION_AVR_RE),
'ppc32': (scrub_asm_powerpc, ASM_FUNCTION_PPC_RE),
'powerpc': (scrub_asm_powerpc, ASM_FUNCTION_PPC_RE),
'riscv32': (scrub_asm_riscv, ASM_FUNCTION_RISCV_RE),