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[X86] Fix the lower1BitShuffle code added in r369215 to correctly pass the widened vector to the KSHIFT node.

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Not sure how to test this as we have tests that exercise this code,
but nothing failed for the types not matching. Since all the k-registers
use equivalent register classes everything just ends up working.

llvm-svn: 369228
This commit is contained in:
Craig Topper 2019-08-19 04:08:44 +00:00
parent 6120ffd771
commit b738257b1e
1 changed files with 1 additions and 1 deletions
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lib/Target/X86/X86ISelLowering.cpp
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@ -16654,7 +16654,7 @@ static SDValue lower1BitShuffle(const SDLoc &DL, ArrayRef<int> Mask,
SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideVT,
DAG.getUNDEF(WideVT), V,
DAG.getIntPtrConstant(0, DL));
Res = DAG.getNode(Opcode, DL, WideVT, V,
Res = DAG.getNode(Opcode, DL, WideVT, Res,
DAG.getConstant(ShiftAmt, DL, MVT::i8));
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res,
DAG.getIntPtrConstant(0, DL));