RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
Code Issues Projects Releases Wiki Activity

Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.

Browse Source 
llvm-svn: 101329
This commit is contained in:
Johnny Chen 2010-04-15 01:20:56 +00:00
parent 263c547804
commit b74c5b564c
2 changed files with 7 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
View File

@ -13,8 +13,11 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "arm-disassembler"
#include "ARMDisassemblerCore.h"
#include "ARMAddressingModes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
/// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const
@ -346,7 +349,7 @@ static unsigned getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister,
}
break;
}
errs() << "Invalid (RegClassID, RawRegister) combination\n";
DEBUG(errs() << "Invalid (RegClassID, RawRegister) combination\n");
// Encoding error. Mark the builder with error code != 0.
B->SetErr(-1);
return 0;
@ -893,7 +896,7 @@ static inline bool getBFCInvMask(uint32_t insn, uint32_t &mask) {
uint32_t msb = slice(insn, 20, 16);
uint32_t Val = 0;
if (msb < lsb) {
errs() << "Encoding error: msb < lsb\n";
DEBUG(errs() << "Encoding error: msb < lsb\n");
return false;
}
@ -1911,7 +1914,7 @@ static bool DisassembleVFPLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
// Must be either "ia" or "db" submode.
if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
errs() << "Illegal addressing mode 5 sub-mode!\n";
DEBUG(errs() << "Illegal addressing mode 5 sub-mode!\n");
return false;
}

2
lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
View File

@ -1553,7 +1553,7 @@ static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode,
MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
if (Opcode == ARM::t2BFI) {
if (getMsb(insn) < getLsb(insn)) {
errs() << "Encoding error: msb < lsb\n";
DEBUG(errs() << "Encoding error: msb < lsb\n");
return false;
}
MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));