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[ARM] Add Cortex-M35P

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- Add LLVM backend support for Cortex-M35P
- Documentation can be found at
  https://developer.arm.com/products/processors/cortex-m/cortex-m35p

Differentail Revision: https://reviews.llvm.org/D57763

llvm-svn: 354868
This commit is contained in:
Luke Cheeseman 2019-02-26 12:02:12 +00:00
parent af2ce11950
commit b773e62491
5 changed files with 42 additions and 1 deletions
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1
include/llvm/Support/ARMTargetParser.def
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@ -251,6 +251,7 @@ ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m7", ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP)
ARM_CPU_NAME("cortex-m35p", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP)
ARM_CPU_NAME("cortex-a32", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)

10
lib/Target/ARM/ARM.td
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@ -1011,6 +1011,16 @@ def : ProcessorModel<"cortex-m33", CortexM3Model, [ARMv8mMainline,
FeatureHasSlowFPVMLx,
FeatureHasNoBranchPredictor]>;
def : ProcessorModel<"cortex-m35p", CortexM3Model, [ARMv8mMainline,
FeatureDSP,
FeatureFPARMv8,
FeatureD16,
FeatureVFPOnlySP,
FeaturePrefLoopAlign32,
FeatureHasSlowFPVMLx,
FeatureHasNoBranchPredictor]>;
def : ProcNoItin<"cortex-a32", [ARMv8a,
FeatureHWDivThumb,
FeatureHWDivARM,

27
test/CodeGen/ARM/build-attributes.ll
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@ -106,6 +106,10 @@
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=CORTEX-M35P
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
@ -229,6 +233,8 @@
; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; CPU-SUPPORTED-NOT: is not a recognized processor for this target
@ -1391,6 +1397,27 @@
; CORTEX-M33: .eabi_attribute 38, 1
; CORTEX-M33: .eabi_attribute 14, 0
; CORTEX-M35P: .cpu cortex-m35p
; CORTEX-M35P: .eabi_attribute 6, 17
; CORTEX-M35P: .eabi_attribute 7, 77
; CORTEX-M35P: .eabi_attribute 8, 0
; CORTEX-M35P: .eabi_attribute 9, 3
; CORTEX-M35P: .fpu fpv5-sp-d16
; CORTEX-M35P: .eabi_attribute 27, 1
; CORTEX-M35P: .eabi_attribute 36, 1
; CORTEX-M35P-NOT: .eabi_attribute 44
; CORTEX-M35P: .eabi_attribute 46, 1
; CORTEX-M35P: .eabi_attribute 34, 1
; CORTEX-M35P: .eabi_attribute 17, 1
; CORTEX-M35P: .eabi_attribute 20, 1
; CORTEX-M35P: .eabi_attribute 21, 1
; CORTEX-M35P: .eabi_attribute 23, 3
; CORTEX-M35P: .eabi_attribute 24, 1
; CORTEX-M35P: .eabi_attribute 25, 1
; CORTEX-M35P-NOT: .eabi_attribute 28
; CORTEX-M35P: .eabi_attribute 38, 1
; CORTEX-M35P: .eabi_attribute 14, 0
; CORTEX-M33-FAST-NOT: .eabi_attribute 19
; CORTEX-M33-FAST: .eabi_attribute 20, 2
; CORTEX-M33-FAST-NOT: .eabi_attribute 21

1
test/CodeGen/ARM/movt.ll
View File

@ -4,6 +4,7 @@
; RUN: llc -mtriple=thumbv8m.base %s -o - | FileCheck %s
; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m23 %s -o - | FileCheck %s --check-prefix=NOMOVT
; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m33 %s -o - | FileCheck %s
; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m35p %s -o - | FileCheck %s
define i32 @t(i32 %X) nounwind {
; CHECK-LABEL: t:

4
unittests/Support/TargetParserTest.cpp
View File

@ -286,6 +286,8 @@ TEST(TargetParserTest, testARMCPU) {
ARM::AEK_HWDIVTHUMB, "8-M.Baseline"));
EXPECT_TRUE(testARMCPU("cortex-m33", "armv8-m.main", "fpv5-sp-d16",
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline"));
EXPECT_TRUE(testARMCPU("cortex-m35p", "armv8-m.main", "fpv5-sp-d16",
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline"));
EXPECT_TRUE(testARMCPU("iwmmxt", "iwmmxt", "none",
ARM::AEK_NONE, "iwmmxt"));
EXPECT_TRUE(testARMCPU("xscale", "xscale", "none",
@ -295,7 +297,7 @@ TEST(TargetParserTest, testARMCPU) {
"7-S"));
}
static constexpr unsigned NumARMCPUArchs = 84;
static constexpr unsigned NumARMCPUArchs = 85;
TEST(TargetParserTest, testARMCPUArchList) {
SmallVector<StringRef, NumARMCPUArchs> List;