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use range-based for loops; NFCI
llvm-svn: 241076
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479ebec42f
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b781314531
@ -829,8 +829,7 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
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// Filter and process dependencies, computing the earliest issue cycle.
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unsigned Cycle = 0;
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for (unsigned i = 0, e = Deps.size(); i != e; ++i) {
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const DataDep &Dep = Deps[i];
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for (const DataDep &Dep : Deps) {
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const TraceBlockInfo&DepTBI =
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BlockInfo[Dep.DefMI->getParent()->getNumber()];
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// Ignore dependencies from outside the current trace.
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@ -1088,9 +1087,9 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
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MTM.SchedModel, MTM.TII, MTM.TRI);
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// Update the required height of any virtual registers read by MI.
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for (unsigned i = 0, e = Deps.size(); i != e; ++i)
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if (pushDepHeight(Deps[i], MI, Cycle, Heights, MTM.SchedModel, MTM.TII))
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addLiveIns(Deps[i].DefMI, Deps[i].DefOp, Stack);
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for (const DataDep &Dep : Deps)
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if (pushDepHeight(Dep, MI, Cycle, Heights, MTM.SchedModel, MTM.TII))
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addLiveIns(Dep.DefMI, Dep.DefOp, Stack);
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InstrCycles &MICycles = Cycles[MI];
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MICycles.Height = Cycle;
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@ -1106,8 +1105,7 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
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// Update virtual live-in heights. They were added by addLiveIns() with a 0
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// height because the final height isn't known until now.
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DEBUG(dbgs() << "BB#" << MBB->getNumber() << " Live-ins:");
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for (unsigned i = 0, e = TBI.LiveIns.size(); i != e; ++i) {
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LiveInReg &LIR = TBI.LiveIns[i];
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for (LiveInReg &LIR : TBI.LiveIns) {
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const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
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LIR.Height = Heights.lookup(DefMI);
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DEBUG(dbgs() << ' ' << PrintReg(LIR.Reg) << '@' << LIR.Height);
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