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Store a bit in MCSection saying if it was registered with MCAssembler.
With this we can replace a SetVector with a plain std::vector. llvm-svn: 238706
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@ -12,7 +12,6 @@
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/ilist.h"
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#include "llvm/ADT/ilist.h"
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@ -574,7 +573,7 @@ class MCAssembler {
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friend class MCAsmLayout;
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friend class MCAsmLayout;
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public:
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public:
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typedef SetVector<MCSection *> SectionListType;
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typedef std::vector<MCSection *> SectionListType;
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typedef std::vector<const MCSymbol *> SymbolDataListType;
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typedef std::vector<const MCSymbol *> SymbolDataListType;
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typedef pointee_iterator<SectionListType::const_iterator> const_iterator;
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typedef pointee_iterator<SectionListType::const_iterator> const_iterator;
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@ -903,7 +902,13 @@ public:
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/// \name Backend Data Access
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/// \name Backend Data Access
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/// @{
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/// @{
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bool registerSection(MCSection &Section) { return Sections.insert(&Section); }
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bool registerSection(MCSection &Section) {
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if (Section.isRegistered())
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return false;
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Sections.push_back(&Section);
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Section.setIsRegistered(true);
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return true;
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}
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bool hasSymbolData(const MCSymbol &Symbol) const { return Symbol.hasData(); }
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bool hasSymbolData(const MCSymbol &Symbol) const { return Symbol.hasData(); }
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@ -78,6 +78,8 @@ private:
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/// Whether this section has had instructions emitted into it.
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/// Whether this section has had instructions emitted into it.
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unsigned HasInstructions : 1;
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unsigned HasInstructions : 1;
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unsigned IsRegistered : 1;
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FragmentListType Fragments;
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FragmentListType Fragments;
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/// Mapping from subsection number to insertion point for subsection numbers
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/// Mapping from subsection number to insertion point for subsection numbers
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@ -130,6 +132,9 @@ public:
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bool hasInstructions() const { return HasInstructions; }
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bool hasInstructions() const { return HasInstructions; }
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void setHasInstructions(bool Value) { HasInstructions = Value; }
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void setHasInstructions(bool Value) { HasInstructions = Value; }
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bool isRegistered() const { return IsRegistered; }
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void setIsRegistered(bool Value) { IsRegistered = Value; }
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MCSection::FragmentListType &getFragmentList() { return Fragments; }
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MCSection::FragmentListType &getFragmentList() { return Fragments; }
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const MCSection::FragmentListType &getFragmentList() const {
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const MCSection::FragmentListType &getFragmentList() const {
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return const_cast<MCSection *>(this)->getFragmentList();
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return const_cast<MCSection *>(this)->getFragmentList();
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@ -21,7 +21,7 @@ using namespace llvm;
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MCSection::MCSection(SectionVariant V, SectionKind K, MCSymbol *Begin)
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MCSection::MCSection(SectionVariant V, SectionKind K, MCSymbol *Begin)
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: Begin(Begin), BundleGroupBeforeFirstInst(false), HasInstructions(false),
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: Begin(Begin), BundleGroupBeforeFirstInst(false), HasInstructions(false),
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Variant(V), Kind(K) {}
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IsRegistered(false), Variant(V), Kind(K) {}
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MCSymbol *MCSection::getEndSymbol(MCContext &Ctx) {
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MCSymbol *MCSection::getEndSymbol(MCContext &Ctx) {
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if (!End)
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if (!End)
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@ -789,9 +789,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
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uint64_t SectionDataSize = 0;
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uint64_t SectionDataSize = 0;
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uint64_t SectionDataFileSize = 0;
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uint64_t SectionDataFileSize = 0;
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uint64_t VMSize = 0;
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uint64_t VMSize = 0;
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for (MCAssembler::const_iterator it = Asm.begin(),
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for (const MCSection &Sec : Asm) {
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ie = Asm.end(); it != ie; ++it) {
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const MCSection &Sec = *it;
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uint64_t Address = getSectionAddress(&Sec);
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uint64_t Address = getSectionAddress(&Sec);
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uint64_t Size = Layout.getSectionAddressSize(&Sec);
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uint64_t Size = Layout.getSectionAddressSize(&Sec);
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uint64_t FileSize = Layout.getSectionFileSize(&Sec);
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uint64_t FileSize = Layout.getSectionFileSize(&Sec);
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@ -799,7 +797,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
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VMSize = std::max(VMSize, Address + Size);
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VMSize = std::max(VMSize, Address + Size);
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if (it->isVirtualSection())
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if (Sec.isVirtualSection())
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continue;
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continue;
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SectionDataSize = std::max(SectionDataSize, Address + Size);
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SectionDataSize = std::max(SectionDataSize, Address + Size);
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@ -820,12 +818,11 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
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// ... and then the section headers.
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// ... and then the section headers.
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uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
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uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
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for (MCAssembler::const_iterator it = Asm.begin(),
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for (const MCSection &Sec : Asm) {
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ie = Asm.end(); it != ie; ++it) {
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std::vector<RelAndSymbol> &Relocs = Relocations[&Sec];
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std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
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unsigned NumRelocs = Relocs.size();
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unsigned NumRelocs = Relocs.size();
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uint64_t SectionStart = SectionDataStart + getSectionAddress(&*it);
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uint64_t SectionStart = SectionDataStart + getSectionAddress(&Sec);
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WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
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WriteSection(Asm, Layout, Sec, SectionStart, RelocTableEnd, NumRelocs);
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RelocTableEnd += NumRelocs * sizeof(MachO::any_relocation_info);
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RelocTableEnd += NumRelocs * sizeof(MachO::any_relocation_info);
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}
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}
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@ -899,9 +896,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
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}
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}
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// Write the actual section data.
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// Write the actual section data.
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for (MCAssembler::const_iterator it = Asm.begin(),
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for (const MCSection &Sec : Asm) {
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ie = Asm.end(); it != ie; ++it) {
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MCSection &Sec = *it;
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Asm.writeSectionData(&Sec, Layout);
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Asm.writeSectionData(&Sec, Layout);
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uint64_t Pad = getPaddingSize(&Sec, Layout);
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uint64_t Pad = getPaddingSize(&Sec, Layout);
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@ -912,11 +907,10 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
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WriteZeros(SectionDataPadding);
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WriteZeros(SectionDataPadding);
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// Write the relocation entries.
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// Write the relocation entries.
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for (MCAssembler::const_iterator it = Asm.begin(),
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for (const MCSection &Sec : Asm) {
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ie = Asm.end(); it != ie; ++it) {
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// Write the section relocation entries, in reverse order to match 'as'
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// Write the section relocation entries, in reverse order to match 'as'
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// (approximately, the exact algorithm is more complicated than this).
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// (approximately, the exact algorithm is more complicated than this).
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std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
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std::vector<RelAndSymbol> &Relocs = Relocations[&Sec];
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for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
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for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
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Write32(Relocs[e - i - 1].MRE.r_word0);
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Write32(Relocs[e - i - 1].MRE.r_word0);
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Write32(Relocs[e - i - 1].MRE.r_word1);
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Write32(Relocs[e - i - 1].MRE.r_word1);
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@ -1021,7 +1021,7 @@ void WinCOFFObjectWriter::WriteObject(MCAssembler &Asm,
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{
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{
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sections::iterator i, ie;
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sections::iterator i, ie;
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MCAssembler::const_iterator j, je;
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MCAssembler::iterator j, je;
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for (auto &Section : Sections) {
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for (auto &Section : Sections) {
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if (Section->Number != -1) {
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if (Section->Number != -1) {
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