diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 6030c957420..e5bc08b9280 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -18606,7 +18606,8 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) { "Trying to extract from >1 concat operand?"); assert(NewExtIdx % ExtNumElts == 0 && "Extract index is not a multiple of the input vector length."); - SDValue NewIndexC = DAG.getIntPtrConstant(NewExtIdx, DL); + MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout()); + SDValue NewIndexC = DAG.getConstant(NewExtIdx, DL, IdxTy); return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NVT, V.getOperand(ConcatOpIdx), NewIndexC); } diff --git a/test/CodeGen/AMDGPU/extract-subvector.ll b/test/CodeGen/AMDGPU/extract-subvector.ll new file mode 100644 index 00000000000..19eb6756991 --- /dev/null +++ b/test/CodeGen/AMDGPU/extract-subvector.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=amdgcn -mtriple=amdgcn-- -verify-machineinstrs -o - %s | FileCheck %s + +; CHECK-LABEL: foo +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: buffer_load_ushort +; CHECK: v_bfe_i32 +; CHECK: v_bfe_i32 + +define <2 x i16> @foo(<8 x i16> addrspace(1) * %p0, <8 x i16> addrspace(1) * %p1) { + br i1 undef, label %T, label %F + +T: + %t = load volatile <8 x i16>, <8 x i16> addrspace(1) * %p0 + br label %exit + +F: + %f = load volatile <8 x i16>, <8 x i16> addrspace(1) * %p1 + br label %exit + +exit: + %m = phi <8 x i16> [ %t, %T ], [ %f, %F ] + %v2 = shufflevector <8 x i16> %m, <8 x i16> undef, <2 x i32> + %b2 = icmp sgt <2 x i16> %v2, + %r2 = select <2 x i1> %b2, <2 x i16> , <2 x i16> + ret <2 x i16> %r2 +}