mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 19:12:56 +02:00
Remove the restriction on the first operand of the add node in SelectAddr.
This change reduces the number of instructions generated. For example, (load (add (sub $n0, $n1), (MipsLo got(s)))) results in the following sequence of instructions: 1. sub $n2, $n0, $n1 2. lw got(s)($n2) Previously, three instructions were needed. 1. sub $n2, $n0, $n1 2. addiu $n3, $n2, got(s) 3. lw 0($n3) llvm-svn: 146888
This commit is contained in:
parent
6e9471925b
commit
b7ebcb2ded
@ -160,9 +160,7 @@ SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) {
|
|||||||
// Generate:
|
// Generate:
|
||||||
// lui $2, %hi($CPI1_0)
|
// lui $2, %hi($CPI1_0)
|
||||||
// lwc1 $f0, %lo($CPI1_0)($2)
|
// lwc1 $f0, %lo($CPI1_0)($2)
|
||||||
if ((Addr.getOperand(0).getOpcode() == MipsISD::Hi ||
|
if (Addr.getOperand(1).getOpcode() == MipsISD::Lo) {
|
||||||
Addr.getOperand(0).getOpcode() == ISD::LOAD) &&
|
|
||||||
Addr.getOperand(1).getOpcode() == MipsISD::Lo) {
|
|
||||||
SDValue LoVal = Addr.getOperand(1);
|
SDValue LoVal = Addr.getOperand(1);
|
||||||
if (isa<ConstantPoolSDNode>(LoVal.getOperand(0)) ||
|
if (isa<ConstantPoolSDNode>(LoVal.getOperand(0)) ||
|
||||||
isa<GlobalAddressSDNode>(LoVal.getOperand(0))) {
|
isa<GlobalAddressSDNode>(LoVal.getOperand(0))) {
|
||||||
|
@ -55,7 +55,7 @@ entry:
|
|||||||
; PIC: jalr $25
|
; PIC: jalr $25
|
||||||
; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
|
; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i)
|
||||||
; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2
|
; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2
|
||||||
; PIC: addiu ${{[0-9]+}}, $[[R1]], %dtprel_lo(f3.i)
|
; PIC: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]])
|
||||||
|
|
||||||
%0 = load i32* @f3.i, align 4
|
%0 = load i32* @f3.i, align 4
|
||||||
%inc = add nsw i32 %0, 1
|
%inc = add nsw i32 %0, 1
|
||||||
|
Loading…
Reference in New Issue
Block a user