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Handle regmasks in Thumb1RegisterInfo::saveScavengerRegister().
This function could have r12 live across a function call when compiling thumb1 code. The test case for this is not included because it is very long. It must provoke emergency spilling near a function call. The behavior is provoked by MultiSource/Applications/JM/lencod, and it triggers an assertion in the scavenger. <rdar://problem/10963642> llvm-svn: 151855
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@ -571,6 +571,11 @@ Thumb1RegisterInfo::saveScavengerRegister(MachineBasicBlock &MBB,
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// If this instruction affects R12, adjust our restore point.
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for (unsigned i = 0, e = II->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = II->getOperand(i);
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if (MO.isRegMask() && MO.clobbersPhysReg(ARM::R12)) {
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UseMI = II;
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done = true;
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break;
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}
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if (!MO.isReg() || MO.isUndef() || !MO.getReg() ||
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TargetRegisterInfo::isVirtualRegister(MO.getReg()))
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continue;
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