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Add isLegalAddressingMode address space argument to TTI
Update to match the TLI version, and remove the TLI version's default argument. llvm-svn: 239260
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@ -305,7 +305,8 @@ public:
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/// mode is legal for a load/store of any legal type.
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/// TODO: Handle pre/postinc as well.
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) const;
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace = 0) const;
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/// \brief Return true if the target works with masked instruction
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/// AVX2 allows masks for consecutive load and store for i32 and i64 elements.
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@ -321,7 +322,8 @@ public:
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/// If the AM is not supported, it returns a negative value.
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/// TODO: Handle pre/postinc as well.
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) const;
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace = 0) const;
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/// \brief Return true if it's free to truncate a value of type Ty1 to type
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/// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
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@ -541,12 +543,13 @@ public:
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virtual bool isLegalICmpImmediate(int64_t Imm) = 0;
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virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset, bool HasBaseReg,
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int64_t Scale) = 0;
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int64_t Scale,
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unsigned AddrSpace) = 0;
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virtual bool isLegalMaskedStore(Type *DataType, int Consecutive) = 0;
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virtual bool isLegalMaskedLoad(Type *DataType, int Consecutive) = 0;
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virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset, bool HasBaseReg,
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int64_t Scale) = 0;
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int64_t Scale, unsigned AddrSpace) = 0;
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virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
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virtual bool isProfitableToHoist(Instruction *I) = 0;
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virtual bool isTypeLegal(Type *Ty) = 0;
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@ -650,9 +653,10 @@ public:
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return Impl.isLegalICmpImmediate(Imm);
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}
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) override {
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace) override {
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return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
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Scale);
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Scale, AddrSpace);
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}
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bool isLegalMaskedStore(Type *DataType, int Consecutive) override {
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return Impl.isLegalMaskedStore(DataType, Consecutive);
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@ -661,8 +665,10 @@ public:
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return Impl.isLegalMaskedLoad(DataType, Consecutive);
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}
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) override {
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return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale);
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace) override {
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return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
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Scale, AddrSpace);
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}
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bool isTruncateFree(Type *Ty1, Type *Ty2) override {
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return Impl.isTruncateFree(Ty1, Ty2);
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@ -207,7 +207,8 @@ public:
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bool isLegalICmpImmediate(int64_t Imm) { return false; }
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) {
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace) {
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// Guess that only reg and reg+reg addressing is allowed. This heuristic is
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// taken from the implementation of LSR.
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return !BaseGV && BaseOffset == 0 && (Scale == 0 || Scale == 1);
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@ -218,9 +219,10 @@ public:
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bool isLegalMaskedLoad(Type *DataType, int Consecutive) { return false; }
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) {
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bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
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// Guess that all legal addressing mode are free.
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if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale))
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if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
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Scale, AddrSpace))
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return 0;
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return -1;
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}
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@ -125,23 +125,24 @@ public:
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}
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bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) {
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace) {
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TargetLoweringBase::AddrMode AM;
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AM.BaseGV = BaseGV;
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AM.BaseOffs = BaseOffset;
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AM.HasBaseReg = HasBaseReg;
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AM.Scale = Scale;
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return getTLI()->isLegalAddressingMode(AM, Ty);
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return getTLI()->isLegalAddressingMode(AM, Ty, AddrSpace);
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}
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int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale) {
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bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
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TargetLoweringBase::AddrMode AM;
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AM.BaseGV = BaseGV;
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AM.BaseOffs = BaseOffset;
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AM.HasBaseReg = HasBaseReg;
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AM.Scale = Scale;
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return getTLI()->getScalingFactorCost(AM, Ty);
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return getTLI()->getScalingFactorCost(AM, Ty, AddrSpace);
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}
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bool isTruncateFree(Type *Ty1, Type *Ty2) {
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@ -1462,7 +1462,7 @@ public:
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///
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/// TODO: Remove default argument
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virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
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unsigned AddrSpace = 0) const;
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unsigned AddrSpace) const;
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/// \brief Return the cost of the scaling factor used in the addressing mode
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/// represented by AM for this target, for a load/store of the specified type.
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@ -100,9 +100,10 @@ bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
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bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset,
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bool HasBaseReg,
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int64_t Scale) const {
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int64_t Scale,
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unsigned AddrSpace) const {
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return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
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Scale);
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Scale, AddrSpace);
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}
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bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
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@ -118,9 +119,10 @@ bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
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int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset,
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bool HasBaseReg,
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int64_t Scale) const {
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int64_t Scale,
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unsigned AddrSpace) const {
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return TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
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Scale);
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Scale, AddrSpace);
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}
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bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
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