RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
Code Issues Projects Releases Wiki Activity

[MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets

Browse Source 
This relands D64327 with a more specific workaround for R_386_GOTOFF
(gold<2.34 bug https://sourceware.org/bugzilla/show_bug.cgi?id=16794)

.debug_info has quite a few .debug_str relocations (R_386_32/R_ARM_ABS32).
The original workaround was too general and introduced too many .L symbols
used just as relocation targets.

From the original review:

  ... it reduced the size of a big ARM-32 debug image by 33%. It contained ~68M
  of relocations symbols out of total ~71M symbols (96% of symbols table was
  generated for relocations with symbol).
This commit is contained in:
Fangrui Song 2020-12-20 18:37:14 -08:00
parent f1b04222fd
commit b9e92f17ed
6 changed files with 16 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
lib/MC/ELFObjectWriter.cpp
View File

@ -1395,9 +1395,10 @@ bool ELFObjectWriter::shouldRelocateWithSymbol(const MCAssembler &Asm,
if (C != 0)
return true;
// It looks like gold has a bug (http://sourceware.org/PR16794) and can
// only handle section relocations to mergeable sections if using RELA.
if (!hasRelocationAddend())
// gold<2.34 incorrectly ignored the addend for R_386_GOTOFF (9)
// (http://sourceware.org/PR16794).
if (TargetObjectWriter->getEMachine() == ELF::EM_386 &&
Type == ELF::R_386_GOTOFF)
return true;
}

4
test/MC/ELF/basic-elf-32.s
View File

@ -46,9 +46,9 @@ main: # @main
// CHECK: Relocations [
// CHECK: Section {{.*}} .rel.text {
// CHECK: 0x6 R_386_32 .L.str1
// CHECK: 0x6 R_386_32 .rodata.str1.1
// CHECK: 0xB R_386_PC32 puts
// CHECK: 0x12 R_386_32 .L.str2
// CHECK: 0x12 R_386_32 .rodata.str1.1
// CHECK: 0x17 R_386_PC32 puts
// CHECK: }
// CHECK: ]

4
test/MC/ELF/compression.s
View File

@ -38,7 +38,7 @@
// In x86 32 bit named symbols are used for temporary symbols in merge
// sections, so make sure we handle symbols inside compressed sections
// 386-SYMBOLS-GNU: Name: .Linfo_string0
// 386-SYMBOLS-GNU: Name: .zdebug_str
// 386-SYMBOLS-GNU-NOT: }
// 386-SYMBOLS-GNU: Section: .zdebug_str
@ -73,7 +73,7 @@
// ZLIB-STYLE-FLAGS32-NEXT: AddressAlignment: 4
// ZLIB-STYLE-FLAGS64-NEXT: AddressAlignment: 8
// 386-SYMBOLS-ZLIB: Name: .Linfo_string0
// 386-SYMBOLS-ZLIB: Name: .debug_str
// 386-SYMBOLS-ZLIB-NOT: }
// 386-SYMBOLS-ZLIB: Section: .debug_str

5
test/MC/ELF/relocation-386.s
View File

@ -8,7 +8,10 @@
// I386: Format: elf32-i386
// CHECK: Relocations [
// CHECK-NEXT: Section {{.*}} .rel.text {
// CHECK-NEXT: 0x2 R_386_GOTOFF .Lfoo
/// Do not use STT_SECTION symbol for R_386_GOTOFF to work around a gold<2.34 bug
/// https://sourceware.org/bugzilla/show_bug.cgi?id=16794
// I386-NEXT: 0x2 R_386_GOTOFF .Lfoo
// IAMCU-NEXT: 0x2 R_386_GOTOFF .rodata.str1.1
// CHECK-NEXT: 0x{{[^ ]+}} R_386_PLT32 bar2
// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTPC _GLOBAL_OFFSET_TABLE_
// Relocation 3 (bar3@GOTOFF) is done with symbol 7 (bss)

10
test/MC/Mips/elf-relsym.s
View File

@ -4,16 +4,10 @@
// CHECK: Symbols [
// CHECK: Symbol {
// CHECK: Name: $.str
// CHECK: Name: .rodata.cst8
// CHECK: }
// CHECK: Symbol {
// CHECK: Name: $.str1
// CHECK: }
// CHECK: Symbol {
// CHECK: Name: $CPI0_0
// CHECK: }
// CHECK: Symbol {
// CHECK: Name: $CPI0_1
// CHECK: Name: .rodata.str1.1
// CHECK: }
// CHECK: ]

4
test/MC/Mips/xgot.s
View File

@ -10,8 +10,8 @@
// CHECK: 0x1C R_MIPS_GOT_LO16 ext_1
// CHECK: 0x24 R_MIPS_CALL_HI16 printf
// CHECK: 0x30 R_MIPS_CALL_LO16 printf
// CHECK: 0x2C R_MIPS_GOT16 $.str
// CHECK: 0x38 R_MIPS_LO16 $.str
// CHECK: 0x2C R_MIPS_GOT16 .rodata.str1.1
// CHECK: 0x38 R_MIPS_LO16 .rodata.str1.1
// CHECK: ]
.text