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[IPRA][ARM] Make use of the "returned" parameter attribute
ARM has code to recognise uses of the "returned" function parameter attribute which guarantee that the value passed to the function in r0 will be returned in r0 unmodified. IPRA replaces the regmask on call instructions, so needs to be told about this to avoid reverting the optimisation. Differential revision: https://reviews.llvm.org/D64986 llvm-svn: 366669
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@ -9615,6 +9615,8 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
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Flags.setOrigAlign(OriginalAlignment);
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if (ArgCopyElisionCandidates.count(&Arg))
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Flags.setCopyElisionCandidate();
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if (Arg.hasAttribute(Attribute::Returned))
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Flags.setReturned();
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MVT RegisterVT = TLI->getRegisterTypeForCallingConv(
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*CurDAG->getContext(), F.getCallingConv(), VT);
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@ -2097,6 +2097,12 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
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AFI->setLRIsSpilledForFarJump(true);
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}
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AFI->setLRIsSpilled(SavedRegs.test(ARM::LR));
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// If we have the "returned" parameter attribute which guarantees that we
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// return the value which was passed in r0 unmodified (e.g. C++ 'structors),
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// record that fact for IPRA.
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if (AFI->getPreservesR0())
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SavedRegs.set(ARM::R0);
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}
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MachineBasicBlock::iterator ARMFrameLowering::eliminateCallFramePseudoInstr(
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@ -3898,6 +3898,12 @@ SDValue ARMTargetLowering::LowerFormalArguments(
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// Transform the arguments in physical registers into virtual ones.
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unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
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ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT);
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// If this value is passed in r0 and has the returned attribute (e.g.
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// C++ 'structors), record this fact for later use.
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if (VA.getLocReg() == ARM::R0 && Ins[VA.getValNo()].Flags.isReturned()) {
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AFI->setPreservesR0();
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}
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}
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// If this is an 8 or 16-bit value, it is really passed promoted
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@ -130,6 +130,10 @@ class ARMFunctionInfo : public MachineFunctionInfo {
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/// The amount the literal pool has been increasedby due to promoted globals.
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int PromotedGlobalsIncrease = 0;
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/// True if r0 will be preserved by a call to this function (e.g. C++
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/// con/destructors).
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bool PreservesR0 = false;
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public:
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ARMFunctionInfo() = default;
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@ -247,6 +251,9 @@ public:
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}
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DenseMap<unsigned, unsigned> EHPrologueRemappedRegs;
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void setPreservesR0() { PreservesR0 = true; }
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bool getPreservesR0() const { return PreservesR0; }
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};
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} // end namespace llvm
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18
test/CodeGen/ARM/ipra-r0-returned.ll
Normal file
18
test/CodeGen/ARM/ipra-r0-returned.ll
Normal file
@ -0,0 +1,18 @@
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; RUN: llc -mtriple armv7a--none-eabi -enable-ipra=false < %s | FileCheck %s
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; RUN: llc -mtriple armv7a--none-eabi -enable-ipra=true < %s | FileCheck %s
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define i32 @returns_r0(i32 returned %a) {
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entry:
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call void asm sideeffect "", "~{r0}"()
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ret i32 %a
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}
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define i32 @test(i32 %a) {
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; CHECK-LABEL: test:
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entry:
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; CHECK-NOT: r0
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; CHECK: bl returns_r0
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; CHECK-NOT: r0
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%b = call i32 @returns_r0(i32 %a)
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ret i32 %a
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}
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