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R600/SI: add the missing M*BUF|IMG asm operands
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 175753
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@ -250,7 +250,8 @@ class MTBUF_Store_Helper <bits<3> op, string asm, RegisterClass regClass> : MTBU
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(ins regClass:$vdata, i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc,
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i1imm:$addr64, i8imm:$dfmt, i8imm:$nfmt, VReg_32:$vaddr,
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GPR4Align<SReg_128>:$srsrc, i1imm:$slc, i1imm:$tfe, SSrc_32:$soffset),
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asm,
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asm#" $vdata, $offset, $offen, $idxen, $glc, $addr64, $dfmt,"
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#" $nfmt, $vaddr, $srsrc, $slc, $tfe, $soffset",
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[]> {
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let mayStore = 1;
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let mayLoad = 0;
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@ -262,7 +263,8 @@ class MUBUF_Load_Helper <bits<7> op, string asm, RegisterClass regClass> : MUBUF
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(ins i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc, i1imm:$addr64,
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i1imm:$lds, VReg_32:$vaddr, GPR4Align<SReg_128>:$srsrc, i1imm:$slc,
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i1imm:$tfe, SSrc_32:$soffset),
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asm,
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asm#" $dst, $offset, $offen, $idxen, $glc, $addr64, "
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#"$lds, $vaddr, $srsrc, $slc, $tfe, $soffset",
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[]> {
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let mayLoad = 1;
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let mayStore = 0;
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@ -274,7 +276,8 @@ class MTBUF_Load_Helper <bits<3> op, string asm, RegisterClass regClass> : MTBUF
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(ins i16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc, i1imm:$addr64,
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i8imm:$dfmt, i8imm:$nfmt, VReg_32:$vaddr, GPR4Align<SReg_128>:$srsrc,
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i1imm:$slc, i1imm:$tfe, SSrc_32:$soffset),
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asm,
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asm#" $dst, $offset, $offen, $idxen, $glc, $addr64, $dfmt,"
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#" $nfmt, $vaddr, $srsrc, $slc, $tfe, $soffset",
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[]> {
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let mayLoad = 1;
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let mayStore = 0;
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@ -286,7 +289,8 @@ class MIMG_Load_Helper <bits<7> op, string asm> : MIMG <
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(ins i32imm:$dmask, i1imm:$unorm, i1imm:$glc, i1imm:$da, i1imm:$r128,
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i1imm:$tfe, i1imm:$lwe, i1imm:$slc, VReg_32:$vaddr,
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GPR4Align<SReg_256>:$srsrc, GPR4Align<SReg_128>:$ssamp),
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asm,
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asm#" $vdata, $dmask, $unorm, $glc, $da, $r128,"
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#" $tfe, $lwe, $slc, $vaddr, $srsrc, $ssamp",
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[]> {
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let mayLoad = 1;
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let mayStore = 0;
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