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[Test] One CodeGen test showing missing opportunity on move elimination
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test/CodeGen/X86/2020_12_02_decrementing_loop.ll
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44
test/CodeGen/X86/2020_12_02_decrementing_loop.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
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; TODO: We can get rid of movq here by using different offset and %rax.
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define i32 @test(i32* %p, i64 %len, i32 %x) {
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; CHECK-LABEL: test:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB0_1: ## %loop
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: subq $1, %rax
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; CHECK-NEXT: jb LBB0_4
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; CHECK-NEXT: ## %bb.2: ## %backedge
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; CHECK-NEXT: ## in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: cmpl %edx, -4(%rdi,%rsi,4)
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; CHECK-NEXT: movq %rax, %rsi
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; CHECK-NEXT: jne LBB0_1
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; CHECK-NEXT: ## %bb.3: ## %failure
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; CHECK-NEXT: ud2
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; CHECK-NEXT: LBB0_4: ## %exit
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; CHECK-NEXT: movl $-1, %eax
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; CHECK-NEXT: retq
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entry:
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br label %loop
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loop: ; preds = %backedge, %entry
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%iv = phi i64 [ %iv.next, %backedge ], [ %len, %entry ]
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%iv.next = add nsw i64 %iv, -1
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%cond_1 = icmp eq i64 %iv, 0
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br i1 %cond_1, label %exit, label %backedge
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backedge: ; preds = %loop
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%addr = getelementptr inbounds i32, i32* %p, i64 %iv.next
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%loaded = load atomic i32, i32* %addr unordered, align 4
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%cond_2 = icmp eq i32 %loaded, %x
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br i1 %cond_2, label %failure, label %loop
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exit: ; preds = %loop
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ret i32 -1
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failure: ; preds = %backedge
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unreachable
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}
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