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[Alignment][NFC] Use llvmTargetFrameLowering::getStackAlign
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Reviewed By: courbet Subscribers: wuzish, arsenm, jyknight, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, fedor.sergeev, jrtc27, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D76613
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@ -291,10 +291,8 @@ MachineBasicBlock::iterator AArch64FrameLowering::eliminateCallFramePseudoInstr(
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uint64_t CalleePopAmount = IsDestroy ? I->getOperand(1).getImm() : 0;
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if (!hasReservedCallFrame(MF)) {
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unsigned Align = getStackAlignment();
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int64_t Amount = I->getOperand(0).getImm();
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Amount = alignTo(Amount, Align);
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Amount = alignTo(Amount, getStackAlign());
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if (!IsDestroy)
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Amount = -Amount;
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@ -3103,5 +3101,5 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSize(
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MF.getInfo<AArch64FunctionInfo>()->getCalleeSavedStackSize();
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// This is the amount of stack a funclet needs to allocate.
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return alignTo(CSSize + MF.getFrameInfo().getMaxCallFrameSize(),
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getStackAlignment());
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getStackAlign());
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}
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@ -1013,9 +1013,7 @@ MachineBasicBlock::iterator SIFrameLowering::eliminateCallFramePseudoInstr(
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uint64_t CalleePopAmount = IsDestroy ? I->getOperand(1).getImm() : 0;
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if (!hasReservedCallFrame(MF)) {
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unsigned Align = getStackAlignment();
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Amount = alignTo(Amount, Align);
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Amount = alignTo(Amount, getStackAlign());
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assert(isUInt<32>(Amount) && "exceeded stack address space size");
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const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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unsigned SPReg = MFI->getStackPtrOffsetReg();
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@ -601,9 +601,9 @@ needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
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// The FP is only available if there is no dynamic realignment. We
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// don't know for sure yet whether we'll need that, so we guess based
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// on whether there are any local variables that would trigger it.
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unsigned StackAlign = TFI->getStackAlignment();
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if (TFI->hasFP(MF) &&
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!((MFI.getLocalFrameMaxAlign() > StackAlign) && canRealignStack(MF))) {
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!((MFI.getLocalFrameMaxAlign() > TFI->getStackAlign()) &&
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canRealignStack(MF))) {
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if (isFrameOffsetLegal(MI, getFrameRegister(MF), FPOffset))
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return false;
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}
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@ -1596,7 +1596,7 @@ checkNumAlignedDPRCS2Regs(MachineFunction &MF, BitVector &SavedRegs) {
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return;
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// Don't bother if the default stack alignment is sufficiently high.
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if (MF.getSubtarget().getFrameLowering()->getStackAlignment() >= 8)
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if (MF.getSubtarget().getFrameLowering()->getStackAlign() >= Align(8))
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return;
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// Aligned spills require stack realignment.
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@ -2292,8 +2292,8 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
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// of GPRs, spill one extra callee save GPR so we won't have to pad between
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// the integer and double callee save areas.
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LLVM_DEBUG(dbgs() << "NumGPRSpills = " << NumGPRSpills << "\n");
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unsigned TargetAlign = getStackAlignment();
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if (TargetAlign >= 8 && (NumGPRSpills & 1)) {
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const Align TargetAlign = getStackAlign();
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if (TargetAlign >= Align(8) && (NumGPRSpills & 1)) {
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if (CS1Spilled && !UnspilledCS1GPRs.empty()) {
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for (unsigned i = 0, e = UnspilledCS1GPRs.size(); i != e; ++i) {
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unsigned Reg = UnspilledCS1GPRs[i];
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@ -2330,7 +2330,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
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if (BigFrameOffsets && !ExtraCSSpill) {
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// If any non-reserved CS register isn't spilled, just spill one or two
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// extra. That should take care of it!
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unsigned NumExtras = TargetAlign / 4;
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unsigned NumExtras = TargetAlign.value() / 4;
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SmallVector<unsigned, 2> Extras;
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while (NumExtras && !UnspilledCS1GPRs.empty()) {
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unsigned Reg = UnspilledCS1GPRs.back();
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@ -127,7 +127,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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// We need to keep the stack aligned properly. To do this, we round the
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// amount of space needed for the outgoing arguments up to the next
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// alignment boundary.
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Amount = alignTo(Amount, getStackAlignment());
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Amount = alignTo(Amount, getStackAlign());
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// Replace the pseudo instruction with a new instruction...
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unsigned Opc = Old.getOpcode();
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@ -1711,9 +1711,8 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(R);
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unsigned Size = TRI->getSpillSize(*RC);
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int Off = MinOffset - Size;
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unsigned Align = std::min(TRI->getSpillAlignment(*RC), getStackAlignment());
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assert(isPowerOf2_32(Align));
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Off &= -Align;
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Align Alignment = std::min(TRI->getSpillAlign(*RC), getStackAlign());
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Off &= -Alignment.value();
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int FI = MFI.CreateFixedSpillStackObject(Size, Off);
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MinOffset = std::min(MinOffset, Off);
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CSI.push_back(CalleeSavedInfo(R, FI));
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@ -729,7 +729,7 @@ HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
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auto &HFI = *Subtarget.getFrameLowering();
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// "Zero" means natural stack alignment.
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if (A == 0)
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A = HFI.getStackAlignment();
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A = HFI.getStackAlign().value();
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LLVM_DEBUG({
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dbgs () << __func__ << " Align: " << A << " Size: ";
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@ -3447,10 +3447,7 @@ static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT,
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/// ensure minimum alignment required for target.
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static unsigned EnsureStackAlignment(const PPCFrameLowering *Lowering,
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unsigned NumBytes) {
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unsigned TargetAlign = Lowering->getStackAlignment();
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unsigned AlignMask = TargetAlign - 1;
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NumBytes = (NumBytes + AlignMask) & ~AlignMask;
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return NumBytes;
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return alignTo(NumBytes, Lowering->getStackAlign());
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}
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SDValue PPCTargetLowering::LowerFormalArguments(
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@ -2544,15 +2544,15 @@ static SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG,
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const SparcSubtarget *Subtarget) {
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SDValue Chain = Op.getOperand(0); // Legalize the chain.
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SDValue Size = Op.getOperand(1); // Legalize the size.
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unsigned Align = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
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unsigned StackAlign = Subtarget->getFrameLowering()->getStackAlignment();
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MaybeAlign Alignment(cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue());
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Align StackAlign = Subtarget->getFrameLowering()->getStackAlign();
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EVT VT = Size->getValueType(0);
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SDLoc dl(Op);
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// TODO: implement over-aligned alloca. (Note: also implies
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// supporting support for overaligned function frames + dynamic
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// allocations, at all, which currently isn't supported)
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if (Align > StackAlign) {
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if (Alignment && *Alignment > StackAlign) {
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const MachineFunction &MF = DAG.getMachineFunction();
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report_fatal_error("Function \"" + Twine(MF.getName()) + "\": "
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"over-aligned dynamic alloca not supported.");
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