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[InstCombine/PowerPC] Fix single-precision QPX load/store replacement

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The QPX single-precision load/store intrinsics have implied
truncation/extension from/to the declared value type of <4 x double> to the
memory type of <4 x float>. When we can prove the alignment of the pointer
argument, and thus replace the intrinsic with a regular load or store, we need
to load or store the correct data type (<4 x float>) instead of (<4 x double>).

llvm-svn: 236973
This commit is contained in:
Hal Finkel 2015-05-11 06:37:03 +00:00
parent d5a28d81ad
commit bb5d93c15a
2 changed files with 13 additions and 5 deletions
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15
lib/Transforms/InstCombine/InstCombineCalls.cpp
View File

@ -624,9 +624,12 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
// Turn PPC QPX qvlfs -> load if the pointer is known aligned.
if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, DL, II, AC, DT) >=
16) {
Type *VTy = VectorType::get(Builder->getFloatTy(),
II->getType()->getVectorNumElements());
Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
PointerType::getUnqual(II->getType()));
return new LoadInst(Ptr);
PointerType::getUnqual(VTy));
Value *Load = Builder->CreateLoad(Ptr);
return new FPExtInst(Load, II->getType());
}
break;
case Intrinsic::ppc_qpx_qvlfd:
@ -642,10 +645,12 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
// Turn PPC QPX qvstfs -> store if the pointer is known aligned.
if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, DL, II, AC, DT) >=
16) {
Type *OpPtrTy =
PointerType::getUnqual(II->getArgOperand(0)->getType());
Type *VTy = VectorType::get(Builder->getFloatTy(),
II->getArgOperand(0)->getType()->getVectorNumElements());
Value *TOp = Builder->CreateFPTrunc(II->getArgOperand(0), VTy);
Type *OpPtrTy = PointerType::getUnqual(VTy);
Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
return new StoreInst(II->getArgOperand(0), Ptr);
return new StoreInst(TOp, Ptr);
}
break;
case Intrinsic::ppc_qpx_qvstfd:

3
test/Transforms/InstCombine/aligned-qpx.ll
View File

@ -28,6 +28,7 @@ entry:
; CHECK-LABEL: @test1a
; CHECK-NOT: @llvm.ppc.qpx.qvlfs
; CHECK-NOT: load <4 x double>
; CHECK: ret <4 x double>
%v0 = load <4 x float>, <4 x float>* %h, align 8
@ -62,7 +63,9 @@ entry:
ret <4 x float> %v0
; CHECK-LABEL: @test2
; CHECK: fptrunc <4 x double> %d to <4 x float>
; CHECK-NOT: @llvm.ppc.qpx.qvstfs
; CHECK-NOT: store <4 x double>
; CHECK: ret <4 x float>
}