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80 col violation.
llvm-svn: 50266
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@ -54,7 +54,7 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg,
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// Pick the register class of the right type that contains this physreg.
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SmallVector<const TargetRegisterClass*, 4> RCs;
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for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) {
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for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
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if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg))
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RCs.push_back(*I);
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}
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