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AMDGPU/SI: Fix crash caused by r284267
Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D25782 llvm-svn: 284875
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@ -2631,8 +2631,9 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,
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case AMDGPUISD::MUL_U24:
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case AMDGPUISD::MULHI_I24:
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case AMDGPUISD::MULHI_U24: {
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simplifyI24(N, 0, DCI);
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simplifyI24(N, 1, DCI);
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// If the first call to simplify is successfull, then N may end up being
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// deleted, so we shouldn't call simplifyI24 again.
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simplifyI24(N, 0, DCI) || simplifyI24(N, 1, DCI);
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return SDValue();
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}
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case AMDGPUISD::MUL_LOHI_I24:
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@ -146,4 +146,29 @@ entry:
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store i32 %trunc, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}simplify_i24_crash:
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; GCN: v_mul_i32_i24_e32 v[[VAL_LO:[0-9]+]]
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; GCN: v_mov_b32_e32 v[[VAL_HI:[0-9]+]], v[[VAL_LO]]
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; GCN: buffer_store_dwordx2 v{{\[}}[[VAL_LO]]:[[VAL_HI]]{{\]}}
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define void @simplify_i24_crash(<2 x i32> addrspace(1)* %out, i32 %arg0, <2 x i32> %arg1, <2 x i32> %arg2) {
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bb:
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%cmp = icmp eq i32 %arg0, 0
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br i1 %cmp, label %bb11, label %bb7
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bb11:
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%tmp14 = shufflevector <2 x i32> %arg1, <2 x i32> undef, <2 x i32> zeroinitializer
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%tmp16 = shufflevector <2 x i32> %arg2, <2 x i32> undef, <2 x i32> zeroinitializer
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%tmp17 = shl <2 x i32> %tmp14, <i32 8, i32 8>
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%tmp18 = ashr <2 x i32> %tmp17, <i32 8, i32 8>
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%tmp19 = shl <2 x i32> %tmp16, <i32 8, i32 8>
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%tmp20 = ashr <2 x i32> %tmp19, <i32 8, i32 8>
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%tmp21 = mul <2 x i32> %tmp18, %tmp20
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store <2 x i32> %tmp21, <2 x i32> addrspace(1)* %out
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br label %bb7
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bb7:
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ret void
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}
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attributes #0 = { nounwind }
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