diff --git a/lib/Target/X86/X86InstrSVM.td b/lib/Target/X86/X86InstrSVM.td
index bdf47860027..628a9517d9b 100644
--- a/lib/Target/X86/X86InstrSVM.td
+++ b/lib/Target/X86/X86InstrSVM.td
@@ -56,8 +56,8 @@ def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins),
 // 0F 01 DF
 let Uses = [EAX, ECX] in
 def INVLPGA32 : I<0x01, MRM_DF, (outs), (ins),
-                "invlpga\t{%ecx, %eax|eax, ecx}", [], IIC_INVLPG>, TB, Requires<[Not64BitMode]>;
+                "invlpga\t{%eax, %ecx|eax, ecx}", [], IIC_INVLPG>, TB, Requires<[Not64BitMode]>;
 let Uses = [RAX, ECX] in
 def INVLPGA64 : I<0x01, MRM_DF, (outs), (ins),
-                "invlpga\t{%ecx, %rax|rax, ecx}", [], IIC_INVLPG>, TB, Requires<[In64BitMode]>;
+                "invlpga\t{%rax, %ecx|rax, ecx}", [], IIC_INVLPG>, TB, Requires<[In64BitMode]>;
 } // SchedRW
diff --git a/test/CodeGen/X86/schedule-x86_64.ll b/test/CodeGen/X86/schedule-x86_64.ll
index a38fbff3892..999229ec118 100644
--- a/test/CodeGen/X86/schedule-x86_64.ll
+++ b/test/CodeGen/X86/schedule-x86_64.ll
@@ -6740,7 +6740,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
 ; GENERIC-NEXT:    invlpg (%rdi) # sched: [100:0.33]
-; GENERIC-NEXT:    invlpga %ecx, %rax # sched: [100:0.33]
+; GENERIC-NEXT:    invlpga %rax, %ecx # sched: [100:0.33]
 ; GENERIC-NEXT:    #NO_APP
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
@@ -6748,7 +6748,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    #APP
 ; ATOM-NEXT:    invlpg (%rdi) # sched: [71:35.50]
-; ATOM-NEXT:    invlpga %ecx, %rax # sched: [71:35.50]
+; ATOM-NEXT:    invlpga %rax, %ecx # sched: [71:35.50]
 ; ATOM-NEXT:    #NO_APP
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
@@ -6756,7 +6756,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; SLM:       # %bb.0:
 ; SLM-NEXT:    #APP
 ; SLM-NEXT:    invlpg (%rdi) # sched: [100:1.00]
-; SLM-NEXT:    invlpga %ecx, %rax # sched: [100:1.00]
+; SLM-NEXT:    invlpga %rax, %ecx # sched: [100:1.00]
 ; SLM-NEXT:    #NO_APP
 ; SLM-NEXT:    retq # sched: [4:1.00]
 ;
@@ -6764,7 +6764,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; SANDY:       # %bb.0:
 ; SANDY-NEXT:    #APP
 ; SANDY-NEXT:    invlpg (%rdi) # sched: [100:0.33]
-; SANDY-NEXT:    invlpga %ecx, %rax # sched: [100:0.33]
+; SANDY-NEXT:    invlpga %rax, %ecx # sched: [100:0.33]
 ; SANDY-NEXT:    #NO_APP
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
@@ -6772,7 +6772,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; HASWELL:       # %bb.0:
 ; HASWELL-NEXT:    #APP
 ; HASWELL-NEXT:    invlpg (%rdi) # sched: [100:0.25]
-; HASWELL-NEXT:    invlpga %ecx, %rax # sched: [100:0.25]
+; HASWELL-NEXT:    invlpga %rax, %ecx # sched: [100:0.25]
 ; HASWELL-NEXT:    #NO_APP
 ; HASWELL-NEXT:    retq # sched: [7:1.00]
 ;
@@ -6780,7 +6780,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; BROADWELL:       # %bb.0:
 ; BROADWELL-NEXT:    #APP
 ; BROADWELL-NEXT:    invlpg (%rdi) # sched: [100:0.25]
-; BROADWELL-NEXT:    invlpga %ecx, %rax # sched: [100:0.25]
+; BROADWELL-NEXT:    invlpga %rax, %ecx # sched: [100:0.25]
 ; BROADWELL-NEXT:    #NO_APP
 ; BROADWELL-NEXT:    retq # sched: [7:1.00]
 ;
@@ -6788,7 +6788,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; SKYLAKE:       # %bb.0:
 ; SKYLAKE-NEXT:    #APP
 ; SKYLAKE-NEXT:    invlpg (%rdi) # sched: [100:0.25]
-; SKYLAKE-NEXT:    invlpga %ecx, %rax # sched: [100:0.25]
+; SKYLAKE-NEXT:    invlpga %rax, %ecx # sched: [100:0.25]
 ; SKYLAKE-NEXT:    #NO_APP
 ; SKYLAKE-NEXT:    retq # sched: [7:1.00]
 ;
@@ -6796,7 +6796,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    #APP
 ; SKX-NEXT:    invlpg (%rdi) # sched: [100:0.25]
-; SKX-NEXT:    invlpga %ecx, %rax # sched: [100:0.25]
+; SKX-NEXT:    invlpga %rax, %ecx # sched: [100:0.25]
 ; SKX-NEXT:    #NO_APP
 ; SKX-NEXT:    retq # sched: [7:1.00]
 ;
@@ -6804,7 +6804,7 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; BTVER2:       # %bb.0:
 ; BTVER2-NEXT:    #APP
 ; BTVER2-NEXT:    invlpg (%rdi) # sched: [100:0.17]
-; BTVER2-NEXT:    invlpga %ecx, %rax # sched: [100:0.17]
+; BTVER2-NEXT:    invlpga %rax, %ecx # sched: [100:0.17]
 ; BTVER2-NEXT:    #NO_APP
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;
@@ -6812,10 +6812,10 @@ define void @test_invlpg_invlpga(i8 *%a0) optsize {
 ; ZNVER1:       # %bb.0:
 ; ZNVER1-NEXT:    #APP
 ; ZNVER1-NEXT:    invlpg (%rdi) # sched: [100:?]
-; ZNVER1-NEXT:    invlpga %ecx, %rax # sched: [100:?]
+; ZNVER1-NEXT:    invlpga %rax, %ecx # sched: [100:?]
 ; ZNVER1-NEXT:    #NO_APP
 ; ZNVER1-NEXT:    retq # sched: [1:0.50]
-  tail call void asm sideeffect "invlpg $0 \0A\09 invlpga %ecx, %rax", "*m"(i8 *%a0) nounwind
+  tail call void asm sideeffect "invlpg $0 \0A\09 invlpga %rax, %ecx", "*m"(i8 *%a0) nounwind
   ret void
 }
 
diff --git a/test/MC/X86/SVM-32.s b/test/MC/X86/SVM-32.s
index 1b756ac3c30..c08eb818f64 100644
--- a/test/MC/X86/SVM-32.s
+++ b/test/MC/X86/SVM-32.s
@@ -4,9 +4,9 @@
 // CHECK: encoding: [0x0f,0x01,0xdd]          
 clgi 
 
-// CHECK: invlpga %ecx, %eax 
+// CHECK: invlpga %eax, %ecx 
 // CHECK: encoding: [0x0f,0x01,0xdf]        
-invlpga %ecx, %eax 
+invlpga %eax, %ecx 
 
 // CHECK: skinit %eax 
 // CHECK: encoding: [0x0f,0x01,0xde]         
diff --git a/test/MC/X86/SVM-64.s b/test/MC/X86/SVM-64.s
index c5c26774a82..6ed73fd3ac0 100644
--- a/test/MC/X86/SVM-64.s
+++ b/test/MC/X86/SVM-64.s
@@ -4,9 +4,9 @@
 // CHECK: encoding: [0x0f,0x01,0xdd]          
 clgi 
 
-// CHECK: invlpga %ecx, %rax 
+// CHECK: invlpga %rax, %ecx 
 // CHECK: encoding: [0x0f,0x01,0xdf]        
-invlpga %ecx, %rax 
+invlpga %rax, %ecx 
 
 // CHECK: skinit %eax 
 // CHECK: encoding: [0x0f,0x01,0xde]         
diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s
index 09e147fd162..f97a9fc1fbb 100644
--- a/test/MC/X86/x86-32-coverage.s
+++ b/test/MC/X86/x86-32-coverage.s
@@ -10532,8 +10532,8 @@
 // CHECK: 	skinit %eax
         	skinit %eax
 
-// CHECK: 	invlpga %ecx, %eax
-        	invlpga %ecx, %eax
+// CHECK: 	invlpga %eax, %ecx
+        	invlpga %eax, %ecx
 
 // CHECK:   blendvps	%xmm0, (%eax), %xmm1   # encoding: [0x66,0x0f,0x38,0x14,0x08]
             blendvps (%eax), %xmm1
diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s
index 1fae8e02055..d34aef0d743 100644
--- a/test/MC/X86/x86-32.s
+++ b/test/MC/X86/x86-32.s
@@ -65,8 +65,8 @@
 	skinit %eax
 // CHECK: skinit %eax
 // CHECK: encoding: [0x0f,0x01,0xde]
-	invlpga %ecx, %eax
-// CHECK: invlpga %ecx, %eax
+	invlpga %eax, %ecx
+// CHECK: invlpga %eax, %ecx
 // CHECK: encoding: [0x0f,0x01,0xdf]
 
 	rdtscp