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[X86] add dwarf annotation for inline stack probe
While probing stack, the stack register is moved without dwarf information, which could cause panic if unwind the backtrace. This commit only add annotation for the inline stack probe case. Dwarf information for the loop case should be done in another patch and need further discussion. Reviewed By: nagisa Differential Revision: https://reviews.llvm.org/D99579
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@ -553,6 +553,8 @@ void X86FrameLowering::emitStackProbeInlineGenericBlock(
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MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset,
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uint64_t AlignOffset) const {
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const bool NeedsDwarfCFI = needsDwarfCFI(MF);
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const bool HasFP = hasFP(MF);
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const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
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const X86TargetLowering &TLI = *STI.getTargetLowering();
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const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset);
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@ -570,6 +572,11 @@ void X86FrameLowering::emitStackProbeInlineGenericBlock(
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.addReg(StackPtr)
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.addImm(StackProbeSize - AlignOffset)
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.setMIFlag(MachineInstr::FrameSetup);
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if (!HasFP && NeedsDwarfCFI) {
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BuildCFI(MBB, MBBI, DL,
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MCCFIInstruction::createAdjustCfaOffset(
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nullptr, StackProbeSize - AlignOffset));
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}
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MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MovMIOpc))
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@ -591,7 +598,11 @@ void X86FrameLowering::emitStackProbeInlineGenericBlock(
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.setMIFlag(MachineInstr::FrameSetup);
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MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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if (!HasFP && NeedsDwarfCFI) {
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BuildCFI(
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MBB, MBBI, DL,
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MCCFIInstruction::createAdjustCfaOffset(nullptr, StackProbeSize));
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}
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addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MovMIOpc))
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.setMIFlag(MachineInstr::FrameSetup),
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StackPtr, false, 0)
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@ -607,6 +618,8 @@ void X86FrameLowering::emitStackProbeInlineGenericBlock(
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.addReg(StackPtr)
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.addImm(ChunkSize)
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.setMIFlag(MachineInstr::FrameSetup);
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// No need to adjust Dwarf CFA offset here, the last position of the stack has
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// been defined
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MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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}
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@ -1200,6 +1213,13 @@ bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
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return Is64Bit && !IsWin64CC && !Fn.hasFnAttribute(Attribute::NoRedZone);
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}
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bool X86FrameLowering::isWin64Prologue(const MachineFunction &MF) const {
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return MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
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}
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bool X86FrameLowering::needsDwarfCFI(const MachineFunction &MF) const {
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return !isWin64Prologue(MF) && MF.needsFrameMoves();
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}
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/// emitPrologue - Push callee-saved registers onto the stack, which
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/// automatically adjust the stack pointer. Adjust the stack pointer to allocate
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@ -1305,13 +1325,13 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
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MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
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bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
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bool HasFP = hasFP(MF);
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bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
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bool IsWin64Prologue = isWin64Prologue(MF);
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bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry();
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// FIXME: Emit FPO data for EH funclets.
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bool NeedsWinFPO =
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!IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
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bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
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bool NeedsDwarfCFI = !IsWin64Prologue && MF.needsFrameMoves();
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bool NeedsDwarfCFI = needsDwarfCFI(MF);
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Register FramePtr = TRI->getFrameRegister(MF);
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const Register MachineFramePtr =
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STI.isTarget64BitILP32()
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@ -192,6 +192,10 @@ public:
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bool has128ByteRedZone(const MachineFunction& MF) const;
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private:
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bool isWin64Prologue(const MachineFunction &MF) const;
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bool needsDwarfCFI(const MachineFunction &MF) const;
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uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
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/// Emit target stack probe as a call to a helper function
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@ -8,6 +8,7 @@ define i32 @foo() local_unnamed_addr #0 {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
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; CHECK-NEXT: .cfi_adjust_cfa_offset 4096
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; CHECK-NEXT: movq $0, (%rsp)
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; CHECK-NEXT: subq $1784, %rsp # imm = 0x6F8
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; CHECK-NEXT: .cfi_def_cfa_offset 5888
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@ -8,6 +8,7 @@ define i32 @foo() local_unnamed_addr #0 {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
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; CHECK-NEXT: .cfi_adjust_cfa_offset 4096
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; CHECK-NEXT: movq $0, (%rsp)
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; CHECK-NEXT: subq $3784, %rsp # imm = 0xEC8
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; CHECK-NEXT: .cfi_def_cfa_offset 7888
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@ -6,6 +6,7 @@ define i32 @foo() local_unnamed_addr #0 {
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; CHECK-X86-64-LABEL: foo:
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; CHECK-X86-64: # %bb.0:
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; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000
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; CHECK-X86-64-NEXT: .cfi_adjust_cfa_offset 4096
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; CHECK-X86-64-NEXT: movq $0, (%rsp)
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; CHECK-X86-64-NEXT: subq $3784, %rsp # imm = 0xEC8
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; CHECK-X86-64-NEXT: .cfi_def_cfa_offset 7888
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@ -18,6 +19,7 @@ define i32 @foo() local_unnamed_addr #0 {
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; CHECK-X86-32-LABEL: foo:
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; CHECK-X86-32: # %bb.0:
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; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000
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; CHECK-X86-32-NEXT: .cfi_adjust_cfa_offset 4096
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; CHECK-X86-32-NEXT: movl $0, (%esp)
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; CHECK-X86-32-NEXT: subl $3916, %esp # imm = 0xF4C
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; CHECK-X86-32-NEXT: .cfi_def_cfa_offset 8016
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@ -10,6 +10,7 @@ define void @foo() local_unnamed_addr #0 {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $4096, %rsp # imm = 0x1000
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; CHECK-NEXT: .cfi_adjust_cfa_offset 4096
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; CHECK-NEXT: movq $0, (%rsp)
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; CHECK-NEXT: subq $3912, %rsp # imm = 0xF48
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; CHECK-NEXT: .cfi_def_cfa_offset 8016
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