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[X86] Add initialization of MXCSR in llvm-exegesis

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Summary: This patch is used to initialize the new added register MXCSR.

Reviewers: craig.topper, RKSimon

Subscribers: tschuett, courbet, llvm-commits, LiuChen3

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70874
This commit is contained in:
Wang, Pengfei 2019-12-01 13:35:53 +08:00
parent 3b0861bc13
commit bc5e31e993
2 changed files with 20 additions and 0 deletions
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3
test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s
View File

@ -5,3 +5,6 @@ CHECK: mode: uops
CHECK-NEXT: key:
CHECK-NEXT: instructions:
CHECK-NEXT: VFMADDSS4rm
CHECK: register_initial_values:
# FIXME: This will be changed to CHECK by the following patch that modeling MXCSR to VFMADDSS.
CHECK-NOT: MXCSR

17
tools/llvm-exegesis/lib/X86/Target.cpp
View File

@ -439,6 +439,8 @@ struct ConstantInliner {
std::vector<MCInst> popFlagAndFinalize();
std::vector<MCInst> loadMXCSRAndFinalize(bool HasAVX);
private:
ConstantInliner &add(const MCInst &Inst) {
Instructions.push_back(Inst);
@ -499,6 +501,19 @@ std::vector<MCInst> ConstantInliner::popFlagAndFinalize() {
return std::move(Instructions);
}
std::vector<MCInst> ConstantInliner::loadMXCSRAndFinalize(bool HasAVX) {
add(allocateStackSpace(4));
add(fillStackSpace(X86::MOV32mi, 0, 0x1f80)); // Mask all FP exceptions
add(MCInstBuilder(HasAVX ? X86::VLDMXCSR : X86::LDMXCSR)
// Address = ESP
.addReg(X86::RSP) // BaseReg
.addImm(1) // ScaleAmt
.addReg(0) // IndexReg
.addImm(0) // Disp
.addReg(0)); // Segment
return std::move(Instructions);
}
void ConstantInliner::initStack(unsigned Bytes) {
assert(Constant_.getBitWidth() <= Bytes * 8 &&
"Value does not have the correct size");
@ -699,6 +714,8 @@ std::vector<MCInst> ExegesisX86Target::setRegTo(const MCSubtargetInfo &STI,
}
if (Reg == X86::EFLAGS)
return CI.popFlagAndFinalize();
if (Reg == X86::MXCSR)
return CI.loadMXCSRAndFinalize(STI.getFeatureBits()[X86::FeatureAVX]);
return {}; // Not yet implemented.
}