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Define the 2-address flag used by X86 instructions (add,sub,and,or,xor) that
need to be declared as such. llvm-svn: 4975
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@ -54,7 +54,8 @@ const unsigned M_PREFETCH_FLAG = 1 << 11;
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const unsigned M_STORE_FLAG = 1 << 12;
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const unsigned M_DUMMY_PHI_FLAG = 1 << 13;
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const unsigned M_PSEUDO_FLAG = 1 << 14;
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// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
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const unsigned M_2_ADDR_FLAG = 1 << 15;
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struct MachineInstrDescriptor {
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const char * Name; // Assembly language mnemonic for the opcode.
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@ -186,6 +187,9 @@ public:
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bool isPseudoInstr(const MachineOpCode opCode) const {
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return get(opCode).Flags & M_PSEUDO_FLAG;
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}
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bool isTwoAddrInstr(const MachineOpCode opCode) const {
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return get(opCode).Flags & M_2_ADDR_FLAG;
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}
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// Check if an instruction can be issued before its operands are ready,
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// or if a subsequent instruction that uses its result can be issued
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@ -54,7 +54,8 @@ const unsigned M_PREFETCH_FLAG = 1 << 11;
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const unsigned M_STORE_FLAG = 1 << 12;
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const unsigned M_DUMMY_PHI_FLAG = 1 << 13;
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const unsigned M_PSEUDO_FLAG = 1 << 14;
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// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
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const unsigned M_2_ADDR_FLAG = 1 << 15;
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struct MachineInstrDescriptor {
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const char * Name; // Assembly language mnemonic for the opcode.
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@ -186,6 +187,9 @@ public:
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bool isPseudoInstr(const MachineOpCode opCode) const {
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return get(opCode).Flags & M_PSEUDO_FLAG;
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}
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bool isTwoAddrInstr(const MachineOpCode opCode) const {
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return get(opCode).Flags & M_2_ADDR_FLAG;
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}
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// Check if an instruction can be issued before its operands are ready,
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// or if a subsequent instruction that uses its result can be issued
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