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[LiveDebugValues] Handle spill locations with a fixed and scalable component.
This patch fixes the two LiveDebugValues implementations (InstrRef/VarLoc)Based to handle cases where the StackOffset contains both a fixed and scalable component. This depends on the `TargetRegisterInfo::prependOffsetExpression` being added in D90020. Feel free to leave comments on that patch if you have them. Reviewed By: djtodoro, jmorse Differential Revision: https://reviews.llvm.org/D90046
This commit is contained in:
Sander de Smalen
parent
6e066a74ee
commit
bccf0ebdc1
@ -182,6 +182,7 @@
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/TypeSize.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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#include <cassert>
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@ -221,14 +222,16 @@ namespace {
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// an offset.
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struct SpillLoc {
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unsigned SpillBase;
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int SpillOffset;
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StackOffset SpillOffset;
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bool operator==(const SpillLoc &Other) const {
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return std::tie(SpillBase, SpillOffset) ==
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std::tie(Other.SpillBase, Other.SpillOffset);
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return std::make_pair(SpillBase, SpillOffset) ==
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std::make_pair(Other.SpillBase, Other.SpillOffset);
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}
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bool operator<(const SpillLoc &Other) const {
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return std::tie(SpillBase, SpillOffset) <
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std::tie(Other.SpillBase, Other.SpillOffset);
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return std::make_tuple(SpillBase, SpillOffset.getFixed(),
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SpillOffset.getScalable()) <
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std::make_tuple(Other.SpillBase, Other.SpillOffset.getFixed(),
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Other.SpillOffset.getScalable());
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}
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};
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@ -769,8 +772,10 @@ public:
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} else if (LocIdxToLocID[*MLoc] >= NumRegs) {
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unsigned LocID = LocIdxToLocID[*MLoc];
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const SpillLoc &Spill = SpillLocs[LocID - NumRegs + 1];
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Expr = DIExpression::prepend(Expr, DIExpression::ApplyOffset,
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Spill.SpillOffset);
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auto *TRI = MF.getSubtarget().getRegisterInfo();
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Expr = TRI->prependOffsetExpression(Expr, DIExpression::ApplyOffset,
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Spill.SpillOffset);
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unsigned Base = Spill.SpillBase;
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MIB.addReg(Base, RegState::Debug);
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MIB.addImm(0);
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@ -1579,9 +1584,7 @@ InstrRefBasedLDV::extractSpillBaseRegAndOffset(const MachineInstr &MI) {
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const MachineBasicBlock *MBB = MI.getParent();
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Register Reg;
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StackOffset Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
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assert(!Offset.getScalable() &&
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"Frame offsets with a scalable component are not supported");
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return {Reg, static_cast<int>(Offset.getFixed())};
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return {Reg, Offset};
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}
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/// End all previous ranges related to @MI and start a new range from @MI
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@ -145,6 +145,7 @@
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/TypeSize.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include <algorithm>
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@ -292,7 +293,7 @@ private:
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// register and an offset.
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struct SpillLoc {
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unsigned SpillBase;
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int SpillOffset;
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StackOffset SpillOffset;
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bool operator==(const SpillLoc &Other) const {
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return SpillBase == Other.SpillBase && SpillOffset == Other.SpillOffset;
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}
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@ -323,21 +324,20 @@ private:
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/// The value location. Stored separately to avoid repeatedly
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/// extracting it from MI.
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union {
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union LocUnion {
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uint64_t RegNo;
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SpillLoc SpillLocation;
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uint64_t Hash;
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int64_t Immediate;
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const ConstantFP *FPImm;
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const ConstantInt *CImm;
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LocUnion() : Hash(0) {}
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} Loc;
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VarLoc(const MachineInstr &MI, LexicalScopes &LS)
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: Var(MI.getDebugVariable(), MI.getDebugExpression(),
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MI.getDebugLoc()->getInlinedAt()),
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Expr(MI.getDebugExpression()), MI(MI) {
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static_assert((sizeof(Loc) == sizeof(uint64_t)),
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"hash does not cover all members of Loc");
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assert(MI.isDebugValue() && "not a DBG_VALUE");
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assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
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if (int RegNo = isDbgValueDescribedByReg(MI)) {
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@ -413,7 +413,7 @@ private:
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/// Take the variable described by DBG_VALUE MI, and create a VarLoc
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/// locating it in the specified spill location.
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static VarLoc CreateSpillLoc(const MachineInstr &MI, unsigned SpillBase,
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int SpillOffset, LexicalScopes &LS) {
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StackOffset SpillOffset, LexicalScopes &LS) {
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VarLoc VL(MI, LS);
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assert(VL.Kind == RegisterKind);
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VL.Kind = SpillLocKind;
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@ -450,7 +450,8 @@ private:
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// Use the original DBG_VALUEs expression to build the spilt location
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// on top of. FIXME: spill locations created before this pass runs
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// are not recognized, and not handled here.
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auto *SpillExpr = DIExpression::prepend(
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auto *TRI = MF.getSubtarget().getRegisterInfo();
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auto *SpillExpr = TRI->prependOffsetExpression(
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DIExpr, DIExpression::ApplyOffset, Loc.SpillLocation.SpillOffset);
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unsigned Base = Loc.SpillLocation.SpillBase;
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return BuildMI(MF, DbgLoc, IID, true, Base, Var, SpillExpr);
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@ -519,7 +520,9 @@ private:
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break;
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case SpillLocKind:
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Out << printReg(Loc.SpillLocation.SpillBase, TRI);
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Out << "[" << Loc.SpillLocation.SpillOffset << "]";
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Out << "[" << Loc.SpillLocation.SpillOffset.getFixed() << " + "
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<< Loc.SpillLocation.SpillOffset.getScalable() << "x vscale"
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<< "]";
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break;
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case ImmediateKind:
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Out << Loc.Immediate;
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@ -542,14 +545,45 @@ private:
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#endif
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bool operator==(const VarLoc &Other) const {
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return Kind == Other.Kind && Var == Other.Var &&
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Loc.Hash == Other.Loc.Hash && Expr == Other.Expr;
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if (Kind != Other.Kind || !(Var == Other.Var) || Expr != Other.Expr)
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return false;
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switch (Kind) {
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case SpillLocKind:
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return Loc.SpillLocation == Other.Loc.SpillLocation;
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case RegisterKind:
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case ImmediateKind:
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case EntryValueKind:
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case EntryValueBackupKind:
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case EntryValueCopyBackupKind:
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return Loc.Hash == Other.Loc.Hash;
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default:
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llvm_unreachable("Invalid kind");
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}
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}
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/// This operator guarantees that VarLocs are sorted by Variable first.
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bool operator<(const VarLoc &Other) const {
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return std::tie(Var, Kind, Loc.Hash, Expr) <
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std::tie(Other.Var, Other.Kind, Other.Loc.Hash, Other.Expr);
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switch (Kind) {
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case SpillLocKind:
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return std::make_tuple(Var, Kind, Loc.SpillLocation.SpillBase,
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Loc.SpillLocation.SpillOffset.getFixed(),
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Loc.SpillLocation.SpillOffset.getScalable(),
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Expr) <
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std::make_tuple(
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Other.Var, Other.Kind, Other.Loc.SpillLocation.SpillBase,
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Loc.SpillLocation.SpillOffset.getFixed(),
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Loc.SpillLocation.SpillOffset.getScalable(), Other.Expr);
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case RegisterKind:
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case ImmediateKind:
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case EntryValueKind:
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case EntryValueBackupKind:
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case EntryValueCopyBackupKind:
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return std::tie(Var, Kind, Loc.Hash, Expr) <
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std::tie(Other.Var, Other.Kind, Other.Loc.Hash, Other.Expr);
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default:
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llvm_unreachable("Invalid kind");
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}
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}
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};
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@ -984,9 +1018,7 @@ VarLocBasedLDV::extractSpillBaseRegAndOffset(const MachineInstr &MI) {
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const MachineBasicBlock *MBB = MI.getParent();
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Register Reg;
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StackOffset Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
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assert(!Offset.getScalable() &&
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"Frame offsets with a scalable component are not supported");
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return {Reg, static_cast<int>(Offset.getFixed())};
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return {Reg, Offset};
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}
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/// Try to salvage the debug entry value if we encounter a new debug value
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174
test/CodeGen/AArch64/live-debugvalues-sve.mir
Normal file
174
test/CodeGen/AArch64/live-debugvalues-sve.mir
Normal file
@ -0,0 +1,174 @@
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# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -mattr=+sve -o - %s | FileCheck %s
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# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -experimental-debug-variable-locations -mattr=+sve -o - %s | FileCheck %s
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#
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# Test that the LiveDebugValues pass can correctly handle the address
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# of the SVE spill (at a scalable address location) which is expressed
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# with a complex DIExpression.
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#
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# CHECK: $z2 = ORR_ZZZ killed $z1, $z1
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# CHECK: $z1 = ORR_ZZZ killed $z0, $z0
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# CHECK-DAG: ST1W_IMM renamable $z1, killed renamable $p{{[0-9]+}}, $fp, -[[#%u,OFFSET:]], debug-location !{{[0-9]+}} :: (store unknown-size into %stack.0, align 16)
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# CHECK-DAG: DBG_VALUE $fp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, [[#mul(OFFSET,8)]], DW_OP_bregx, 46, 0, DW_OP_mul, DW_OP_minus),
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#
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# TODO: When LiveDebugValues pass supports reloads for AArch64, it should
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# correctly recognize debug-value !27 is in $z1 after the following reload:
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#
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# CHECK: renamable $z1 = LD1W_IMM renamable $p0, $fp, -[[#OFFSET]], debug-location !34 :: (load unknown-size from %stack.0, align 16)
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# CHECK-DAG: ST1W_IMM killed renamable $z3, killed renamable $p0, $fp, -[[#OFFSET]] :: (store unknown-size into %stack.0, align 16)
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# CHECK-DAG: DBG_VALUE $noreg, $noreg, !27, !DIExpression(), debug-location !30
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--- |
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; ModuleID = 't.c'
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source_filename = "t.c"
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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; Function Attrs: nounwind
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define dso_local <vscale x 8 x i32> @foo(<vscale x 4 x i32> %z0, <vscale x 4 x i32> %z1, i32 %c) local_unnamed_addr #0 !dbg !11 {
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entry:
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call void @llvm.dbg.value(metadata <vscale x 4 x i32> %z0, metadata !27, metadata !DIExpression()), !dbg !30
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call void @llvm.dbg.value(metadata <vscale x 4 x i32> %z1, metadata !28, metadata !DIExpression()), !dbg !30
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call void @llvm.dbg.value(metadata i32 %c, metadata !29, metadata !DIExpression()), !dbg !30
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%tobool.not = icmp eq i32 %c, 0, !dbg !31
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br i1 %tobool.not, label %if.end, label %if.then, !dbg !33
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if.then: ; preds = %entry
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%call = call <vscale x 8 x i32> @bar(<vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0, <vscale x 4 x i32> %z0) #0, !dbg !34
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br label %return, !dbg !35
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if.end: ; preds = %entry
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%0 = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32> %z1, <vscale x 4 x i32> %z0), !dbg !36
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br label %return, !dbg !37
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return: ; preds = %if.end, %if.then
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%retval.0 = phi <vscale x 8 x i32> [ %call, %if.then ], [ %0, %if.end ], !dbg !30
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ret <vscale x 8 x i32> %retval.0, !dbg !38
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}
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declare !dbg !39 dso_local <vscale x 8 x i32> @bar(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>) local_unnamed_addr
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; Function Attrs: nounwind readonly
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declare <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>)
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; Function Attrs: nounwind readnone speculatable willreturn
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declare void @llvm.dbg.value(metadata, metadata, metadata) #1
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attributes #0 = { "frame-pointer"="non-leaf"}
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attributes #1 = { readnone speculatable willreturn }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4, !5, !6, !7, !8, !9}
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!llvm.ident = !{!10}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0 (https://github.com/llvm/llvm-project.git b19275ba870a06c5ef0428af6264ffd28c7cde9e)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
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!1 = !DIFile(filename: "t.c", directory: "/tmp/")
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!2 = !{}
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!3 = !{i32 7, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = !{i32 1, !"wchar_size", i32 4}
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!6 = !{i32 1, !"branch-target-enforcement", i32 0}
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!7 = !{i32 1, !"sign-return-address", i32 0}
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!8 = !{i32 1, !"sign-return-address-all", i32 0}
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!9 = !{i32 1, !"sign-return-address-with-bkey", i32 0}
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!10 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project.git b19275ba870a06c5ef0428af6264ffd28c7cde9e)"}
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!11 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 6, type: !12, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !26)
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!12 = !DISubroutineType(types: !13)
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!13 = !{!14, !21, !21, !18}
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!14 = !DIDerivedType(tag: DW_TAG_typedef, name: "svint32x2_t", file: !15, line: 59, baseType: !16)
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!15 = !DIFile(filename: "lib/clang/12.0.0/include/arm_sve.h", directory: "/tmp")
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!16 = !DIDerivedType(tag: DW_TAG_typedef, name: "__clang_svint32x2_t", file: !1, baseType: !17)
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!17 = !DICompositeType(tag: DW_TAG_array_type, baseType: !18, flags: DIFlagVector, elements: !19)
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!18 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!19 = !{!20}
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!20 = !DISubrange(lowerBound: 0, upperBound: !DIExpression(DW_OP_constu, 4, DW_OP_bregx, 46, 0, DW_OP_mul, DW_OP_constu, 1, DW_OP_minus))
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!21 = !DIDerivedType(tag: DW_TAG_typedef, name: "svint32_t", file: !15, line: 34, baseType: !22)
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!22 = !DIDerivedType(tag: DW_TAG_typedef, name: "__SVInt32_t", file: !1, baseType: !23)
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!23 = !DICompositeType(tag: DW_TAG_array_type, baseType: !18, flags: DIFlagVector, elements: !24)
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!24 = !{!25}
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!25 = !DISubrange(lowerBound: 0, upperBound: !DIExpression(DW_OP_constu, 2, DW_OP_bregx, 46, 0, DW_OP_mul, DW_OP_constu, 1, DW_OP_minus))
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!26 = !{!27, !28, !29}
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!27 = !DILocalVariable(name: "z0", arg: 1, scope: !11, file: !1, line: 6, type: !21)
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!28 = !DILocalVariable(name: "z1", arg: 2, scope: !11, file: !1, line: 6, type: !21)
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!29 = !DILocalVariable(name: "c", arg: 3, scope: !11, file: !1, line: 6, type: !18)
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!30 = !DILocation(line: 0, scope: !11)
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!31 = !DILocation(line: 7, column: 7, scope: !32)
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!32 = distinct !DILexicalBlock(scope: !11, file: !1, line: 7, column: 7)
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!33 = !DILocation(line: 7, column: 7, scope: !11)
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!34 = !DILocation(line: 8, column: 12, scope: !32)
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!35 = !DILocation(line: 8, column: 5, scope: !32)
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!36 = !DILocation(line: 9, column: 10, scope: !11)
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!37 = !DILocation(line: 9, column: 3, scope: !11)
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!38 = !DILocation(line: 10, column: 1, scope: !11)
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!39 = !DISubprogram(name: "bar", scope: !1, file: !1, line: 3, type: !40, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
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!40 = !DISubroutineType(types: !41)
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!41 = !{!17, !23, !23, !23, !23, !23, !23, !23, !23, !23}
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...
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---
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name: foo
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$z0' }
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- { reg: '$z1' }
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- { reg: '$w0' }
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frameInfo:
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maxAlignment: 16
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 0
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savePoint: '%bb.1'
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restorePoint: '%bb.1'
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stack:
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- { id: 0, size: 16, alignment: 16, stack-id: sve-vec }
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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successors: %bb.2(0x30000000), %bb.1(0x50000000)
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liveins: $w0, $z0, $z1
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DBG_VALUE $z0, $noreg, !27, !DIExpression(), debug-location !30
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DBG_VALUE $z1, $noreg, !28, !DIExpression(), debug-location !30
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DBG_VALUE $w0, $noreg, !29, !DIExpression(), debug-location !30
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renamable $z2 = COPY $z1
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renamable $z1 = COPY $z0
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DBG_VALUE $w0, $noreg, !29, !DIExpression(), debug-location !30
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DBG_VALUE $z2, $noreg, !28, !DIExpression(), debug-location !30
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DBG_VALUE $z1, $noreg, !27, !DIExpression(), debug-location !30
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CBZW killed renamable $w0, %bb.2, debug-location !33
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B %bb.1, debug-location !33
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bb.1.if.then:
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liveins: $z1
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ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp, debug-location !34
|
||||
renamable $p0 = PTRUE_S 31, debug-location !34
|
||||
$x0 = ADDXri %stack.0, 0, 0, debug-location !34
|
||||
ST1W_IMM renamable $z1, killed renamable $p0, %stack.0, 0, debug-location !34 :: (store unknown-size into %stack.0, align 16)
|
||||
$z0 = COPY renamable $z1, debug-location !34
|
||||
$z2 = COPY renamable $z1, debug-location !34
|
||||
$z3 = COPY renamable $z1, debug-location !34
|
||||
$z4 = COPY renamable $z1, debug-location !34
|
||||
$z5 = COPY renamable $z1, debug-location !34
|
||||
$z6 = COPY renamable $z1, debug-location !34
|
||||
$z7 = COPY renamable $z1, debug-location !34
|
||||
BL @bar, csr_aarch64_sve_aapcs, implicit-def dead $lr, implicit $sp, implicit $z0, implicit $z1, implicit $z2, implicit $z3, implicit $z4, implicit $z5, implicit $z6, implicit $z7, implicit $x0, implicit-def $sp, implicit-def $z0, implicit-def $z1, debug-location !34
|
||||
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp, debug-location !34
|
||||
renamable $p0 = PTRUE_S 31, debug-location !34
|
||||
$z3 = IMPLICIT_DEF
|
||||
renamable $z1 = LD1W_IMM renamable $p0, %stack.0, 0, debug-location !34 :: (load unknown-size from %stack.0, align 16)
|
||||
ST1W_IMM renamable $z3, killed renamable $p0, %stack.0, 0 :: (store unknown-size into %stack.0, align 16)
|
||||
renamable $z2 = COPY $z0, debug-location !34
|
||||
B %bb.3, debug-location !35
|
||||
|
||||
bb.2.if.end:
|
||||
liveins: $z1, $z2
|
||||
|
||||
|
||||
bb.3.return:
|
||||
liveins: $z1, $z2
|
||||
|
||||
$z0 = COPY killed renamable $z2, debug-location !38
|
||||
RET_ReallyLR implicit $z0, implicit $z1, debug-location !38
|
||||
|
||||
...
|
||||
Loading…
Reference in New Issue
Block a user