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Remove non-modular header containing static utility functions
The one place that uses these functions isn't particularly long/complicated, so it's easier to just have these inline at that location than trying to split it out into a true header. (in part also because of the use of the DEBUG macros, which make this not really a standalone header even if the static functions were made inline instead) llvm-svn: 324044
This commit is contained in:
David Blaikie
parent
74be2045f5
commit
bd15210d03
@ -1,198 +0,0 @@
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//==-- PPCMachineBasicBlockUtils.h - Functions for common MBB operations ---==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines utility functions for commonly used operations on
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// MachineBasicBlock's.
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// NOTE: Include this file after defining DEBUG_TYPE so that the debug messages
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// can be emitted for the pass that is using this.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_PPC_MACHINE_BASIC_BLOCK_UTILS_H
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#define LLVM_LIB_TARGET_PPC_MACHINE_BASIC_BLOCK_UTILS_H
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#include "PPCInstrInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#ifndef DEBUG_TYPE
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#define DEBUG_TYPE "ppc-generic-mbb-utilities"
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#endif
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using namespace llvm;
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/// Given a basic block \p Successor that potentially contains PHIs, this
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/// function will look for any incoming values in the PHIs that are supposed to
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/// be coming from \p OrigMBB but whose definition is actually in \p NewMBB.
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/// Any such PHIs will be updated to reflect reality.
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static void updatePHIs(MachineBasicBlock *Successor, MachineBasicBlock *OrigMBB,
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MachineBasicBlock *NewMBB, MachineRegisterInfo *MRI) {
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for (auto &MI : Successor->instrs()) {
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if (!MI.isPHI())
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continue;
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// This is a really ugly-looking loop, but it was pillaged directly from
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// MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
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for (unsigned i = 2, e = MI.getNumOperands()+1; i != e; i += 2) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.getMBB() == OrigMBB) {
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// Check if the instruction is actualy defined in NewMBB.
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if (MI.getOperand(i-1).isReg()) {
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MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(i-1).getReg());
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if (DefMI->getParent() == NewMBB || !OrigMBB->isSuccessor(Successor)) {
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MO.setMBB(NewMBB);
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break;
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}
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}
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}
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}
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}
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}
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/// Given a basic block \p Successor that potentially contains PHIs, this
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/// function will look for PHIs that have an incoming value from \p OrigMBB
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/// and will add the same incoming value from \p NewMBB.
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/// NOTE: This should only be used if \p NewMBB is an immediate dominator of
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/// \p OrigMBB.
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static void addIncomingValuesToPHIs(MachineBasicBlock *Successor,
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MachineBasicBlock *OrigMBB,
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MachineBasicBlock *NewMBB,
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MachineRegisterInfo *MRI) {
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assert(OrigMBB->isSuccessor(NewMBB) && "NewMBB must be a sucessor of OrigMBB");
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for (auto &MI : Successor->instrs()) {
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if (!MI.isPHI())
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continue;
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// This is a really ugly-looking loop, but it was pillaged directly from
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// MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
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for (unsigned i = 2, e = MI.getNumOperands()+1; i != e; i += 2) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.getMBB() == OrigMBB) {
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MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI);
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MIB.addReg(MI.getOperand(i-1).getReg()).addMBB(NewMBB);
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break;
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}
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}
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}
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}
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struct BlockSplitInfo {
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MachineInstr *OrigBranch;
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MachineInstr *SplitBefore;
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MachineInstr *SplitCond;
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bool InvertNewBranch;
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bool InvertOrigBranch;
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bool BranchToFallThrough;
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const MachineBranchProbabilityInfo *MBPI;
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MachineInstr *MIToDelete;
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MachineInstr *NewCond;
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bool allInstrsInSameMBB() {
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if (!OrigBranch || !SplitBefore || !SplitCond)
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return false;
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MachineBasicBlock *MBB = OrigBranch->getParent();
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if (SplitBefore->getParent() != MBB ||
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SplitCond->getParent() != MBB)
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return false;
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if (MIToDelete && MIToDelete->getParent() != MBB)
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return false;
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if (NewCond && NewCond->getParent() != MBB)
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return false;
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return true;
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}
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};
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/// Splits a MachineBasicBlock to branch before \p SplitBefore. The original
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/// branch is \p OrigBranch. The target of the new branch can either be the same
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/// as the target of the original branch or the fallthrough successor of the
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/// original block as determined by \p BranchToFallThrough. The branch
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/// conditions will be inverted according to \p InvertNewBranch and
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/// \p InvertOrigBranch. If an instruction that previously fed the branch is to
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/// be deleted, it is provided in \p MIToDelete and \p NewCond will be used as
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/// the branch condition. The branch probabilities will be set if the
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/// MachineBranchProbabilityInfo isn't null.
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static bool splitMBB(BlockSplitInfo &BSI) {
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assert(BSI.allInstrsInSameMBB() &&
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"All instructions must be in the same block.");
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MachineBasicBlock *ThisMBB = BSI.OrigBranch->getParent();
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MachineFunction *MF = ThisMBB->getParent();
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MachineRegisterInfo *MRI = &MF->getRegInfo();
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assert(MRI->isSSA() && "Can only do this while the function is in SSA form.");
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if (ThisMBB->succ_size() != 2) {
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DEBUG(dbgs() << "Don't know how to handle blocks that don't have exactly"
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<< " two succesors.\n");
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return false;
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}
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const PPCInstrInfo *TII = MF->getSubtarget<PPCSubtarget>().getInstrInfo();
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unsigned OrigBROpcode = BSI.OrigBranch->getOpcode();
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unsigned InvertedOpcode =
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OrigBROpcode == PPC::BC ? PPC::BCn :
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OrigBROpcode == PPC::BCn ? PPC::BC :
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OrigBROpcode == PPC::BCLR ? PPC::BCLRn : PPC::BCLR;
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unsigned NewBROpcode = BSI.InvertNewBranch ? InvertedOpcode : OrigBROpcode;
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MachineBasicBlock *OrigTarget = BSI.OrigBranch->getOperand(1).getMBB();
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MachineBasicBlock *OrigFallThrough =
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OrigTarget == *ThisMBB->succ_begin() ? *ThisMBB->succ_rbegin() :
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*ThisMBB->succ_begin();
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MachineBasicBlock *NewBRTarget =
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BSI.BranchToFallThrough ? OrigFallThrough : OrigTarget;
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BranchProbability ProbToNewTarget =
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!BSI.MBPI ? BranchProbability::getUnknown() :
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BSI.MBPI->getEdgeProbability(ThisMBB, NewBRTarget);
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// Create a new basic block.
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MachineBasicBlock::iterator InsertPoint = BSI.SplitBefore;
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const BasicBlock *LLVM_BB = ThisMBB->getBasicBlock();
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MachineFunction::iterator It = ThisMBB->getIterator();
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MachineBasicBlock *NewMBB = MF->CreateMachineBasicBlock(LLVM_BB);
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MF->insert(++It, NewMBB);
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// Move everything after SplitBefore into the new block.
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NewMBB->splice(NewMBB->end(), ThisMBB, InsertPoint, ThisMBB->end());
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NewMBB->transferSuccessors(ThisMBB);
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// Add the two successors to ThisMBB. The probabilities come from the
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// existing blocks if available.
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ThisMBB->addSuccessor(NewBRTarget, ProbToNewTarget);
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ThisMBB->addSuccessor(NewMBB, ProbToNewTarget.getCompl());
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// Add the branches to ThisMBB.
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BuildMI(*ThisMBB, ThisMBB->end(), BSI.SplitBefore->getDebugLoc(),
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TII->get(NewBROpcode)).addReg(BSI.SplitCond->getOperand(0).getReg())
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.addMBB(NewBRTarget);
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BuildMI(*ThisMBB, ThisMBB->end(), BSI.SplitBefore->getDebugLoc(),
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TII->get(PPC::B)).addMBB(NewMBB);
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if (BSI.MIToDelete)
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BSI.MIToDelete->eraseFromParent();
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// Change the condition on the original branch and invert it if requested.
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auto FirstTerminator = NewMBB->getFirstTerminator();
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if (BSI.NewCond) {
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assert(FirstTerminator->getOperand(0).isReg() &&
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"Can't update condition of unconditional branch.");
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FirstTerminator->getOperand(0).setReg(BSI.NewCond->getOperand(0).getReg());
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}
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if (BSI.InvertOrigBranch)
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FirstTerminator->setDesc(TII->get(InvertedOpcode));
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// If any of the PHIs in the successors of NewMBB reference values that
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// now come from NewMBB, they need to be updated.
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for (auto *Succ : NewMBB->successors()) {
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updatePHIs(Succ, ThisMBB, NewMBB, MRI);
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}
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addIncomingValuesToPHIs(NewBRTarget, ThisMBB, NewMBB, MRI);
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DEBUG(dbgs() << "After splitting, ThisMBB:\n"; ThisMBB->dump());
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DEBUG(dbgs() << "NewMBB:\n"; NewMBB->dump());
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DEBUG(dbgs() << "New branch-to block:\n"; NewBRTarget->dump());
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return true;
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}
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#endif
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@ -15,18 +15,20 @@
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//
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//===---------------------------------------------------------------------===//
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#include "PPCInstrInfo.h"
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#include "PPC.h"
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#include "PPCInstrInfo.h"
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#include "PPCTargetMachine.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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#define DEBUG_TYPE "ppc-reduce-cr-ops"
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#include "PPCMachineBasicBlockUtils.h"
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STATISTIC(NumContainedSingleUseBinOps,
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"Number of single-use binary CR logical ops contained in a block");
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@ -50,7 +52,176 @@ namespace llvm {
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void initializePPCReduceCRLogicalsPass(PassRegistry&);
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}
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namespace {
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/// Given a basic block \p Successor that potentially contains PHIs, this
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/// function will look for any incoming values in the PHIs that are supposed to
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/// be coming from \p OrigMBB but whose definition is actually in \p NewMBB.
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/// Any such PHIs will be updated to reflect reality.
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static void updatePHIs(MachineBasicBlock *Successor, MachineBasicBlock *OrigMBB,
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MachineBasicBlock *NewMBB, MachineRegisterInfo *MRI) {
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for (auto &MI : Successor->instrs()) {
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if (!MI.isPHI())
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continue;
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// This is a really ugly-looking loop, but it was pillaged directly from
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// MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
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for (unsigned i = 2, e = MI.getNumOperands() + 1; i != e; i += 2) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.getMBB() == OrigMBB) {
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// Check if the instruction is actualy defined in NewMBB.
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if (MI.getOperand(i - 1).isReg()) {
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MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(i - 1).getReg());
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if (DefMI->getParent() == NewMBB ||
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!OrigMBB->isSuccessor(Successor)) {
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MO.setMBB(NewMBB);
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break;
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}
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}
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}
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}
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}
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}
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/// Given a basic block \p Successor that potentially contains PHIs, this
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/// function will look for PHIs that have an incoming value from \p OrigMBB
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/// and will add the same incoming value from \p NewMBB.
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/// NOTE: This should only be used if \p NewMBB is an immediate dominator of
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/// \p OrigMBB.
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static void addIncomingValuesToPHIs(MachineBasicBlock *Successor,
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MachineBasicBlock *OrigMBB,
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MachineBasicBlock *NewMBB,
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MachineRegisterInfo *MRI) {
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assert(OrigMBB->isSuccessor(NewMBB) &&
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"NewMBB must be a sucessor of OrigMBB");
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for (auto &MI : Successor->instrs()) {
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if (!MI.isPHI())
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continue;
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// This is a really ugly-looking loop, but it was pillaged directly from
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// MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
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for (unsigned i = 2, e = MI.getNumOperands() + 1; i != e; i += 2) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.getMBB() == OrigMBB) {
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MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI);
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MIB.addReg(MI.getOperand(i - 1).getReg()).addMBB(NewMBB);
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break;
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}
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}
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}
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}
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struct BlockSplitInfo {
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MachineInstr *OrigBranch;
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MachineInstr *SplitBefore;
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MachineInstr *SplitCond;
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bool InvertNewBranch;
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bool InvertOrigBranch;
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bool BranchToFallThrough;
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const MachineBranchProbabilityInfo *MBPI;
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MachineInstr *MIToDelete;
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MachineInstr *NewCond;
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bool allInstrsInSameMBB() {
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if (!OrigBranch || !SplitBefore || !SplitCond)
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return false;
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MachineBasicBlock *MBB = OrigBranch->getParent();
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if (SplitBefore->getParent() != MBB || SplitCond->getParent() != MBB)
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return false;
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if (MIToDelete && MIToDelete->getParent() != MBB)
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return false;
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if (NewCond && NewCond->getParent() != MBB)
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return false;
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return true;
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}
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};
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/// Splits a MachineBasicBlock to branch before \p SplitBefore. The original
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/// branch is \p OrigBranch. The target of the new branch can either be the same
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/// as the target of the original branch or the fallthrough successor of the
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/// original block as determined by \p BranchToFallThrough. The branch
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/// conditions will be inverted according to \p InvertNewBranch and
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/// \p InvertOrigBranch. If an instruction that previously fed the branch is to
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/// be deleted, it is provided in \p MIToDelete and \p NewCond will be used as
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/// the branch condition. The branch probabilities will be set if the
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/// MachineBranchProbabilityInfo isn't null.
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static bool splitMBB(BlockSplitInfo &BSI) {
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assert(BSI.allInstrsInSameMBB() &&
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"All instructions must be in the same block.");
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MachineBasicBlock *ThisMBB = BSI.OrigBranch->getParent();
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MachineFunction *MF = ThisMBB->getParent();
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MachineRegisterInfo *MRI = &MF->getRegInfo();
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assert(MRI->isSSA() && "Can only do this while the function is in SSA form.");
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if (ThisMBB->succ_size() != 2) {
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DEBUG(dbgs() << "Don't know how to handle blocks that don't have exactly"
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<< " two succesors.\n");
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return false;
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}
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const PPCInstrInfo *TII = MF->getSubtarget<PPCSubtarget>().getInstrInfo();
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unsigned OrigBROpcode = BSI.OrigBranch->getOpcode();
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unsigned InvertedOpcode =
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OrigBROpcode == PPC::BC
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? PPC::BCn
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: OrigBROpcode == PPC::BCn
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? PPC::BC
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: OrigBROpcode == PPC::BCLR ? PPC::BCLRn : PPC::BCLR;
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unsigned NewBROpcode = BSI.InvertNewBranch ? InvertedOpcode : OrigBROpcode;
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MachineBasicBlock *OrigTarget = BSI.OrigBranch->getOperand(1).getMBB();
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MachineBasicBlock *OrigFallThrough = OrigTarget == *ThisMBB->succ_begin()
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? *ThisMBB->succ_rbegin()
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: *ThisMBB->succ_begin();
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MachineBasicBlock *NewBRTarget =
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BSI.BranchToFallThrough ? OrigFallThrough : OrigTarget;
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BranchProbability ProbToNewTarget =
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!BSI.MBPI ? BranchProbability::getUnknown()
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: BSI.MBPI->getEdgeProbability(ThisMBB, NewBRTarget);
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// Create a new basic block.
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MachineBasicBlock::iterator InsertPoint = BSI.SplitBefore;
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const BasicBlock *LLVM_BB = ThisMBB->getBasicBlock();
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MachineFunction::iterator It = ThisMBB->getIterator();
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MachineBasicBlock *NewMBB = MF->CreateMachineBasicBlock(LLVM_BB);
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MF->insert(++It, NewMBB);
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// Move everything after SplitBefore into the new block.
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NewMBB->splice(NewMBB->end(), ThisMBB, InsertPoint, ThisMBB->end());
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NewMBB->transferSuccessors(ThisMBB);
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// Add the two successors to ThisMBB. The probabilities come from the
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// existing blocks if available.
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ThisMBB->addSuccessor(NewBRTarget, ProbToNewTarget);
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ThisMBB->addSuccessor(NewMBB, ProbToNewTarget.getCompl());
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// Add the branches to ThisMBB.
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BuildMI(*ThisMBB, ThisMBB->end(), BSI.SplitBefore->getDebugLoc(),
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TII->get(NewBROpcode))
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.addReg(BSI.SplitCond->getOperand(0).getReg())
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.addMBB(NewBRTarget);
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BuildMI(*ThisMBB, ThisMBB->end(), BSI.SplitBefore->getDebugLoc(),
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TII->get(PPC::B))
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.addMBB(NewMBB);
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if (BSI.MIToDelete)
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BSI.MIToDelete->eraseFromParent();
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// Change the condition on the original branch and invert it if requested.
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auto FirstTerminator = NewMBB->getFirstTerminator();
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if (BSI.NewCond) {
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assert(FirstTerminator->getOperand(0).isReg() &&
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"Can't update condition of unconditional branch.");
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FirstTerminator->getOperand(0).setReg(BSI.NewCond->getOperand(0).getReg());
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}
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if (BSI.InvertOrigBranch)
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FirstTerminator->setDesc(TII->get(InvertedOpcode));
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// If any of the PHIs in the successors of NewMBB reference values that
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// now come from NewMBB, they need to be updated.
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for (auto *Succ : NewMBB->successors()) {
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updatePHIs(Succ, ThisMBB, NewMBB, MRI);
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}
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addIncomingValuesToPHIs(NewBRTarget, ThisMBB, NewMBB, MRI);
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DEBUG(dbgs() << "After splitting, ThisMBB:\n"; ThisMBB->dump());
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DEBUG(dbgs() << "NewMBB:\n"; NewMBB->dump());
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DEBUG(dbgs() << "New branch-to block:\n"; NewBRTarget->dump());
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return true;
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}
|
||||
|
||||
static bool isBinary(MachineInstr &MI) {
|
||||
return MI.getNumOperands() == 3;
|
||||
@ -149,6 +320,8 @@ computeBranchTargetAndInversion(unsigned CROp, unsigned BROp, bool UsingDef1,
|
||||
llvm_unreachable("Don't know how to handle this branch.");
|
||||
}
|
||||
|
||||
namespace {
|
||||
|
||||
class PPCReduceCRLogicals : public MachineFunctionPass {
|
||||
|
||||
public:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user