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AMDGPU/GlobalISel: Fail instead of assert when selecting loads

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llvm-svn: 364807
This commit is contained in:
Matt Arsenault 2019-07-01 16:36:39 +00:00
parent 7eb472efeb
commit bd2d6c8925
1 changed files with 11 additions and 5 deletions
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16
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
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@ -1036,25 +1036,31 @@ bool AMDGPUInstructionSelector::selectG_LOAD(MachineInstr &I) const {
MachineBasicBlock *BB = I.getParent(); MachineBasicBlock *BB = I.getParent();
MachineFunction *MF = BB->getParent(); MachineFunction *MF = BB->getParent();
MachineRegisterInfo &MRI = MF->getRegInfo(); MachineRegisterInfo &MRI = MF->getRegInfo();
DebugLoc DL = I.getDebugLoc(); const DebugLoc &DL = I.getDebugLoc();
unsigned DstReg = I.getOperand(0).getReg(); Register DstReg = I.getOperand(0).getReg();
unsigned PtrReg = I.getOperand(1).getReg(); Register PtrReg = I.getOperand(1).getReg();
unsigned LoadSize = RBI.getSizeInBits(DstReg, MRI, TRI); unsigned LoadSize = RBI.getSizeInBits(DstReg, MRI, TRI);
unsigned Opcode; unsigned Opcode;
if (MRI.getType(I.getOperand(1).getReg()).getSizeInBits() == 32) {
LLVM_DEBUG(dbgs() << "Unhandled address space\n");
return false;
}
SmallVector<GEPInfo, 4> AddrInfo; SmallVector<GEPInfo, 4> AddrInfo;
getAddrModeInfo(I, MRI, AddrInfo); getAddrModeInfo(I, MRI, AddrInfo);
switch (LoadSize) { switch (LoadSize) {
default:
llvm_unreachable("Load size not supported\n");
case 32: case 32:
Opcode = AMDGPU::FLAT_LOAD_DWORD; Opcode = AMDGPU::FLAT_LOAD_DWORD;
break; break;
case 64: case 64:
Opcode = AMDGPU::FLAT_LOAD_DWORDX2; Opcode = AMDGPU::FLAT_LOAD_DWORDX2;
break; break;
default:
LLVM_DEBUG(dbgs() << "Unhandled load size\n");
return false;
} }
MachineInstr *Flat = BuildMI(*BB, &I, DL, TII.get(Opcode)) MachineInstr *Flat = BuildMI(*BB, &I, DL, TII.get(Opcode))