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[ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the

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MCTargetAsmParser class.

llvm-svn: 163122
This commit is contained in:
Chad Rosier 2012-09-03 18:47:45 +00:00
parent 2a0cfdfaf2
commit bd31fcd8a9
6 changed files with 40 additions and 6 deletions
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3
include/llvm/MC/MCTargetAsmParser.h
View File

@ -111,6 +111,9 @@ public:
return Match_Success;
}
virtual unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
unsigned OperandNum) = 0;
};
} // End llvm namespace

6
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -262,6 +262,12 @@ public:
bool MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
unsigned OperandNum) {
return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum);
}
};
} // end anonymous namespace

5
lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
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@ -56,6 +56,11 @@ class MBlazeAsmParser : public MCTargetAsmParser {
/// }
unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
unsigned OperandNum) {
return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum);
}
public:
MBlazeAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)

13
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
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@ -37,6 +37,11 @@ class MipsAsmParser : public MCTargetAsmParser {
bool ParseDirective(AsmToken DirectiveID);
OperandMatchResultTy parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&);
unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
unsigned OperandNum);
public:
MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
: MCTargetAsmParser() {
@ -96,6 +101,14 @@ public:
};
}
unsigned MipsAsmParser::
GetMCInstOperandNum(unsigned Kind, MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
unsigned OperandNum) {
assert (0 && "GetMCInstOperandNum() not supported by the Mips target.");
return 0;
}
bool MipsAsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,

6
lib/Target/X86/AsmParser/X86AsmParser.cpp
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@ -73,6 +73,12 @@ private:
unsigned &OrigErrorInfo,
bool matchingInlineAsm = false);
unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
unsigned OperandNum) {
return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum);
}
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
/// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode.
bool isSrcOp(X86Operand &Op);

13
utils/TableGen/AsmMatcherEmitter.cpp
View File

@ -1701,9 +1701,9 @@ static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
raw_string_ostream OpOS(OperandFnBody);
// Start the operand number lookup function.
OpOS << "unsigned " << Target.getName() << ClassName << "::\n"
<< "GetMCInstOperandNum(unsigned Kind, MCInst &Inst,\n"
<< " const SmallVectorImpl<MCParsedAsmOperand*> "
<< "&Operands,\n unsigned OperandNum) {\n"
<< "GetMCInstOperandNumImpl(unsigned Kind, MCInst &Inst,\n"
<< " const SmallVectorImpl<MCParsedAsmOperand*> "
<< "&Operands,\n unsigned OperandNum) {\n"
<< " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
<< " unsigned MCOperandNum = 0;\n"
<< " uint8_t *Converter = ConversionTable[Kind];\n"
@ -2580,9 +2580,10 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
<< "unsigned Opcode,\n"
<< " const SmallVectorImpl<MCParsedAsmOperand*> "
<< "&Operands);\n";
OS << " unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst,\n "
<< " const SmallVectorImpl<MCParsedAsmOperand*> "
<< "&Operands,\n unsigned OperandNum);\n";
OS << " unsigned GetMCInstOperandNumImpl(unsigned Kind, MCInst &Inst,\n "
<< " const "
<< "SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n "
<< " unsigned OperandNum);\n";
OS << " bool MnemonicIsValid(StringRef Mnemonic);\n";
OS << " unsigned MatchInstructionImpl(\n"
<< " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"