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[AArch64][GlobalISel] Widen non-pow-2 types for shifts before clamping.

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For types like s96, we don't want to clamp to s64, we want to first widen to
s128 and then narrow it. Otherwise we end up with impossible to legalize types.
This commit is contained in:
Amara Emerson 2021-07-24 14:06:37 -07:00
parent 0a8fb0b4d7
commit bd7a7d5ff0
2 changed files with 38 additions and 2 deletions
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2
lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
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@ -139,9 +139,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
{v4s32, v4s32},
{v2s64, v2s64},
})
.widenScalarToNextPow2(0)
.clampScalar(1, s32, s64)
.clampScalar(0, s32, s64)
.widenScalarToNextPow2(0)
.clampNumElements(0, v2s32, v4s32)
.clampNumElements(0, v2s64, v2s64)
.moreElementsToNextPow2(0)

38
test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
View File

@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
# RUN: llc -O0 -debugify-and-strip-all-safe -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK
---
name: test_shift
@ -474,3 +474,39 @@ body: |
%2:_(<8 x s8>) = G_LSHR %0, %1
$d0 = COPY %2
...
---
name: test_lshr_nonpow2
body: |
bb.0:
; CHECK-LABEL: name: test_lshr_nonpow2
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: %a:_(s32) = COPY $w1
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES %a(s32), %a(s32)
; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES %a(s32), [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[C1]]
; CHECK: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C1]], [[COPY]]
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s64), [[C1]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s64), [[C2]]
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32)
; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[MV1]], [[COPY]](s64)
; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[MV]], [[COPY]](s64)
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[MV1]], [[SUB1]](s64)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[MV1]], [[SUB]](s64)
; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[OR]], [[LSHR2]]
; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC1]](s1), [[MV]], [[SELECT]]
; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[LSHR]], [[C2]]
; CHECK: %d1:_(s32), %d2:_(s32) = G_UNMERGE_VALUES [[SELECT1]](s64)
; CHECK: $w0 = COPY %d2(s32)
%0:_(s64) = COPY $x0
%a:_(s32) = COPY $w1
%merge:_(s96) = G_MERGE_VALUES %a, %a, %a
%lshr:_(s96) = G_LSHR %merge, %0
%d1:_(s32), %d2:_(s32), %d3:_(s32) = G_UNMERGE_VALUES %lshr
$w0 = COPY %d2(s32)
...