diff --git a/lib/CodeGen/MIRParser/MILexer.cpp b/lib/CodeGen/MIRParser/MILexer.cpp
index 503b52dcb38..6770df9ac18 100644
--- a/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/lib/CodeGen/MIRParser/MILexer.cpp
@@ -205,11 +205,11 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
       .Case("tied-def", MIToken::kw_tied_def)
       .Case("frame-setup", MIToken::kw_frame_setup)
       .Case("debug-location", MIToken::kw_debug_location)
-      .Case(".cfi_same_value", MIToken::kw_cfi_same_value)
-      .Case(".cfi_offset", MIToken::kw_cfi_offset)
-      .Case(".cfi_def_cfa_register", MIToken::kw_cfi_def_cfa_register)
-      .Case(".cfi_def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
-      .Case(".cfi_def_cfa", MIToken::kw_cfi_def_cfa)
+      .Case("same_value", MIToken::kw_cfi_same_value)
+      .Case("offset", MIToken::kw_cfi_offset)
+      .Case("def_cfa_register", MIToken::kw_cfi_def_cfa_register)
+      .Case("def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
+      .Case("def_cfa", MIToken::kw_cfi_def_cfa)
       .Case("blockaddress", MIToken::kw_blockaddress)
       .Case("target-index", MIToken::kw_target_index)
       .Case("half", MIToken::kw_half)
diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp
index f8922dabad9..b5c4008e55b 100644
--- a/lib/CodeGen/MIRPrinter.cpp
+++ b/lib/CodeGen/MIRPrinter.cpp
@@ -962,32 +962,32 @@ void MIPrinter::print(const MCCFIInstruction &CFI,
                       const TargetRegisterInfo *TRI) {
   switch (CFI.getOperation()) {
   case MCCFIInstruction::OpSameValue:
-    OS << ".cfi_same_value ";
+    OS << "same_value ";
     if (CFI.getLabel())
       OS << "<mcsymbol> ";
     printCFIRegister(CFI.getRegister(), OS, TRI);
     break;
   case MCCFIInstruction::OpOffset:
-    OS << ".cfi_offset ";
+    OS << "offset ";
     if (CFI.getLabel())
       OS << "<mcsymbol> ";
     printCFIRegister(CFI.getRegister(), OS, TRI);
     OS << ", " << CFI.getOffset();
     break;
   case MCCFIInstruction::OpDefCfaRegister:
-    OS << ".cfi_def_cfa_register ";
+    OS << "def_cfa_register ";
     if (CFI.getLabel())
       OS << "<mcsymbol> ";
     printCFIRegister(CFI.getRegister(), OS, TRI);
     break;
   case MCCFIInstruction::OpDefCfaOffset:
-    OS << ".cfi_def_cfa_offset ";
+    OS << "def_cfa_offset ";
     if (CFI.getLabel())
       OS << "<mcsymbol> ";
     OS << CFI.getOffset();
     break;
   case MCCFIInstruction::OpDefCfa:
-    OS << ".cfi_def_cfa ";
+    OS << "def_cfa ";
     if (CFI.getLabel())
       OS << "<mcsymbol> ";
     printCFIRegister(CFI.getRegister(), OS, TRI);
diff --git a/test/CodeGen/ARM/ARMLoadStoreDBG.mir b/test/CodeGen/ARM/ARMLoadStoreDBG.mir
index b4f19ecc561..f8d671feeb1 100644
--- a/test/CodeGen/ARM/ARMLoadStoreDBG.mir
+++ b/test/CodeGen/ARM/ARMLoadStoreDBG.mir
@@ -144,9 +144,9 @@ body:             |
     liveins: %r0, %r2, %r3, %r7, %lr
 
     %sp = frame-setup t2STMDB_UPD %sp, 14, _, killed %r7, killed %lr
-    frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8
-    frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4
-    frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8
+    frame-setup CFI_INSTRUCTION def_cfa_offset 8
+    frame-setup CFI_INSTRUCTION offset %lr, -4
+    frame-setup CFI_INSTRUCTION offset %r7, -8
     DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28
     DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28
     DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28
diff --git a/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir b/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
index 9a6f8dbafa0..a946b9f9f4a 100644
--- a/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
+++ b/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
@@ -1,5 +1,5 @@
 # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
-# This test ensures that the MIR parser parses the .cfi_def_cfa operands
+# This test ensures that the MIR parser parses the def_cfa operands
 # correctly.
 
 --- |
@@ -21,10 +21,10 @@ body: |
 
     %sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
     %fp = frame-setup ADDXri %sp, 0, 0
-    ; CHECK: CFI_INSTRUCTION .cfi_def_cfa %w29, 16
-    frame-setup CFI_INSTRUCTION .cfi_def_cfa %w29, 16
-    frame-setup CFI_INSTRUCTION .cfi_offset %w30, -8
-    frame-setup CFI_INSTRUCTION .cfi_offset %w29, -16
+    ; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
+    frame-setup CFI_INSTRUCTION def_cfa %w29, 16
+    frame-setup CFI_INSTRUCTION offset %w30, -8
+    frame-setup CFI_INSTRUCTION offset %w29, -16
     BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
     %sp, %fp, %lr = LDPXpost %sp, 2
     RET_ReallyLR
diff --git a/test/CodeGen/MIR/ARM/cfi-same-value.mir b/test/CodeGen/MIR/ARM/cfi-same-value.mir
index 32d0a85b548..1a840883641 100644
--- a/test/CodeGen/MIR/ARM/cfi-same-value.mir
+++ b/test/CodeGen/MIR/ARM/cfi-same-value.mir
@@ -32,9 +32,9 @@ body: |
     liveins: %r11, %lr
 
     %sp = STMDB_UPD %sp, 14, _, %r4, %r5
-    CFI_INSTRUCTION .cfi_def_cfa_offset 8
-    CFI_INSTRUCTION .cfi_offset %r5, -4
-    CFI_INSTRUCTION .cfi_offset %r4, -8
+    CFI_INSTRUCTION def_cfa_offset 8
+    CFI_INSTRUCTION offset %r5, -4
+    CFI_INSTRUCTION offset %r4, -8
     %r5 = MOVr %sp, 14, _, _
     %r4 = MRC 15, 0, 13, 0, 3, 14, _
     %r4 = LDRi12 %r4, 4, 14, _
@@ -48,29 +48,29 @@ body: |
     %r4 = MOVi 48, 14, _, _
     %r5 = MOVi 0, 14, _, _
     %sp = STMDB_UPD %sp, 14, _, %lr
-    CFI_INSTRUCTION .cfi_def_cfa_offset 12
-    CFI_INSTRUCTION .cfi_offset %lr, -12
+    CFI_INSTRUCTION def_cfa_offset 12
+    CFI_INSTRUCTION offset %lr, -12
     BL $__morestack, implicit-def %lr, implicit %sp
     %sp = LDMIA_UPD %sp, 14, _, %lr
     %sp = LDMIA_UPD %sp, 14, _, %r4, %r5
-    CFI_INSTRUCTION .cfi_def_cfa_offset 0
+    CFI_INSTRUCTION def_cfa_offset 0
     BX_RET 14, _
 
   bb.2:
     liveins: %r11, %lr
 
     %sp = LDMIA_UPD %sp, 14, _, %r4, %r5
-    CFI_INSTRUCTION .cfi_def_cfa_offset 0
-  ; CHECK:      CFI_INSTRUCTION .cfi_same_value %r4
-  ; CHECK-NEXT: CFI_INSTRUCTION .cfi_same_value %r5
-    CFI_INSTRUCTION .cfi_same_value %r4
-    CFI_INSTRUCTION .cfi_same_value %r5
+    CFI_INSTRUCTION def_cfa_offset 0
+  ; CHECK:      CFI_INSTRUCTION same_value %r4
+  ; CHECK-NEXT: CFI_INSTRUCTION same_value %r5
+    CFI_INSTRUCTION same_value %r4
+    CFI_INSTRUCTION same_value %r5
     %sp = frame-setup STMDB_UPD %sp, 14, _, killed %r11, killed %lr
-    frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8
-    frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4
-    frame-setup CFI_INSTRUCTION .cfi_offset %r11, -8
+    frame-setup CFI_INSTRUCTION def_cfa_offset 8
+    frame-setup CFI_INSTRUCTION offset %lr, -4
+    frame-setup CFI_INSTRUCTION offset %r11, -8
     %sp = frame-setup SUBri killed %sp, 40, 14, _, _
-    frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 48
+    frame-setup CFI_INSTRUCTION def_cfa_offset 48
     %r0 = MOVr %sp, 14, _, _
     %r1 = MOVi 10, 14, _, _
     BL @dummy_use, csr_aapcs, implicit-def dead %lr, implicit %sp, implicit %r0, implicit killed %r1, implicit-def %sp
diff --git a/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir b/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
index eb4a44b7e17..fef447f1708 100644
--- a/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
+++ b/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
@@ -145,9 +145,9 @@ body:             |
     DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28
     tBX_RET 3, %cpsr, implicit %r0, debug-location !34
     %sp = frame-setup t2STMDB_UPD %sp, 14, _, killed %r7, killed %lr
-    frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8
-    frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4
-    frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8
+    frame-setup CFI_INSTRUCTION def_cfa_offset 8
+    frame-setup CFI_INSTRUCTION offset %lr, -4
+    frame-setup CFI_INSTRUCTION offset %r7, -8
     DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28
     DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28
     DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28
diff --git a/test/CodeGen/MIR/Mips/memory-operands.mir b/test/CodeGen/MIR/Mips/memory-operands.mir
index 69ecf985fcc..0e465e82b33 100644
--- a/test/CodeGen/MIR/Mips/memory-operands.mir
+++ b/test/CodeGen/MIR/Mips/memory-operands.mir
@@ -44,8 +44,8 @@ body:             |
     liveins: %a0, %ra
 
     Save16 %ra, 24, implicit-def %sp, implicit %sp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 24
-    CFI_INSTRUCTION .cfi_offset %ra_64, -4
+    CFI_INSTRUCTION def_cfa_offset 24
+    CFI_INSTRUCTION offset %ra_64, -4
     %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp
     %v0 = SllX16 killed %v0, 16
     %v0 = AdduRxRyRz16 killed %v1, killed %v0
@@ -80,10 +80,10 @@ body:             |
     liveins: %ra, %s2, %s0, %ra, %s2, %s0
 
     SaveX16 %s0, %ra, %s2, 32, implicit-def %sp, implicit %sp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 32
-    CFI_INSTRUCTION .cfi_offset %ra_64, -4
-    CFI_INSTRUCTION .cfi_offset %s2_64, -8
-    CFI_INSTRUCTION .cfi_offset %s0_64, -12
+    CFI_INSTRUCTION def_cfa_offset 32
+    CFI_INSTRUCTION offset %ra_64, -4
+    CFI_INSTRUCTION offset %s2_64, -8
+    CFI_INSTRUCTION offset %s0_64, -12
     %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp
     %v0 = SllX16 killed %v0, 16
     %s0 = AdduRxRyRz16 killed %v1, killed %v0
diff --git a/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir b/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
index ed26df684b0..2bdec446af0 100644
--- a/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
+++ b/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
@@ -1,5 +1,5 @@
 # RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
-# This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands
+# This test ensures that the MIR parser parses the cfi offset operands
 # correctly.
 
 --- |
@@ -21,8 +21,8 @@ stack:
 body: |
   bb.0.entry:
     %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
-    ; CHECK: CFI_INSTRUCTION .cfi_def_cfa_offset 4048
-    CFI_INSTRUCTION .cfi_def_cfa_offset 4048
+    ; CHECK: CFI_INSTRUCTION def_cfa_offset 4048
+    CFI_INSTRUCTION def_cfa_offset 4048
     %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
     RETQ
 ...
diff --git a/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir b/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
index 9a57eb047b8..2afa8e3bf92 100644
--- a/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
+++ b/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
@@ -1,5 +1,5 @@
 # RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
-# This test ensures that the MIR parser parses the .cfi_def_cfa_register
+# This test ensures that the MIR parser parses the cfi def_cfa_register
 # operands correctly.
 
 --- |
@@ -24,9 +24,9 @@ body: |
     liveins: %rbp
 
     PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    CFI_INSTRUCTION .cfi_offset %rbp, -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    CFI_INSTRUCTION offset %rbp, -16
     %rbp = MOV64rr %rsp
-    ; CHECK: CFI_INSTRUCTION .cfi_def_cfa_register %rbp
-    CFI_INSTRUCTION .cfi_def_cfa_register %rbp
+    ; CHECK: CFI_INSTRUCTION def_cfa_register %rbp
+    CFI_INSTRUCTION def_cfa_register %rbp
 ...
diff --git a/test/CodeGen/MIR/X86/cfi-offset.mir b/test/CodeGen/MIR/X86/cfi-offset.mir
index 0a50fe1866f..4cb33073f80 100644
--- a/test/CodeGen/MIR/X86/cfi-offset.mir
+++ b/test/CodeGen/MIR/X86/cfi-offset.mir
@@ -1,5 +1,5 @@
 # RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
-# This test ensures that the MIR parser parses the .cfi_offset operands
+# This test ensures that the MIR parser parses the cfi offset operands
 # correctly.
 
 --- |
@@ -31,9 +31,9 @@ body: |
     liveins: %ecx, %edi, %edx, %esi, %rbx
 
     PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    ; CHECK: CFI_INSTRUCTION .cfi_offset %rbx, -16
-    CFI_INSTRUCTION .cfi_offset %rbx, -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    ; CHECK: CFI_INSTRUCTION offset %rbx, -16
+    CFI_INSTRUCTION offset %rbx, -16
     %ebx = COPY %edi, implicit-def %rbx
     %ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
     %ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags
diff --git a/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
index 0870fa062be..95b1057b5b5 100644
--- a/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
+++ b/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
@@ -33,7 +33,7 @@ body: |
     liveins: %edi, %esi
 
     frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
+    CFI_INSTRUCTION def_cfa_offset 16
     %ecx = COPY %edi
     %ecx = ADD32rr killed %ecx, killed %esi, implicit-def dead %eflags
   ; CHECK: INLINEASM $nop, 1, 12, implicit-def dead early-clobber %ax, 12, implicit-def dead early-clobber %di
diff --git a/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir b/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
index 52ba166094f..eb0d16755c4 100644
--- a/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
+++ b/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
@@ -27,9 +27,9 @@ fixedStack:
 body: |
   bb.0.entry:
     PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    ; CHECK: [[@LINE+1]]:38: expected ','
-    CFI_INSTRUCTION .cfi_offset %rbx -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    ; CHECK: [[@LINE+1]]:33: expected ','
+    CFI_INSTRUCTION offset %rbx -16
     %ebx = COPY %edi, implicit-def %rbx
     %ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
     %ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags
diff --git a/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir b/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
index e3c5ee9b9c8..fd7ad1bb9a4 100644
--- a/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
+++ b/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
@@ -19,8 +19,8 @@ stack:
 body: |
   bb.0.entry:
     %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
-    ; CHECK: [[@LINE+1]]:41: expected a cfi offset
-    CFI_INSTRUCTION .cfi_def_cfa_offset _
+    ; CHECK: [[@LINE+1]]:36: expected a cfi offset
+    CFI_INSTRUCTION def_cfa_offset _
     %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
     RETQ
 ...
diff --git a/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir b/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
index eea79582146..eb53d629a85 100644
--- a/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
+++ b/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
@@ -27,9 +27,9 @@ fixedStack:
 body: |
   bb.0.entry:
     PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    ; CHECK: [[@LINE+1]]:33: expected a cfi register
-    CFI_INSTRUCTION .cfi_offset %0, -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    ; CHECK: [[@LINE+1]]:28: expected a cfi register
+    CFI_INSTRUCTION offset %0, -16
     %ebx = COPY %edi, implicit-def %rbx
     %ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
     %ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags
diff --git a/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir b/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
index f7a48d2eec0..8ae76753984 100644
--- a/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
+++ b/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
@@ -29,7 +29,7 @@ stack:
 body: |
   bb.0.entry:
     frame-setup PUSH32r undef %eax, implicit-def %esp, implicit %esp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 8
+    CFI_INSTRUCTION def_cfa_offset 8
   ; CHECK: name: test
   ; CHECK: %eax = MOV32rm %esp, 1, _, 8, _ :: (load 4 from %fixed-stack.0, align 16)
     %eax = MOV32rm %esp, 1, _, 8, _ :: (load 4 from %fixed-stack.0, align 16)
diff --git a/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir b/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
index 3339115c8bd..988a3432e79 100644
--- a/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
+++ b/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
@@ -19,8 +19,8 @@ stack:
 body: |
   bb.0.entry:
     %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
-    ; CHECK: [[@LINE+1]]:41: expected a 32 bit integer (the cfi offset is too large)
-    CFI_INSTRUCTION .cfi_def_cfa_offset 123456789123456
+    ; CHECK: [[@LINE+1]]:36: expected a 32 bit integer (the cfi offset is too large)
+    CFI_INSTRUCTION def_cfa_offset 123456789123456
     %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
     RETQ
 ...
diff --git a/test/CodeGen/MIR/X86/liveout-register-mask.mir b/test/CodeGen/MIR/X86/liveout-register-mask.mir
index c2a5a34a85c..3e38348961f 100644
--- a/test/CodeGen/MIR/X86/liveout-register-mask.mir
+++ b/test/CodeGen/MIR/X86/liveout-register-mask.mir
@@ -31,10 +31,10 @@ body: |
     liveins: %rdi, %rsi, %rbp
 
     frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    CFI_INSTRUCTION .cfi_offset %rbp, -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    CFI_INSTRUCTION offset %rbp, -16
     %rbp = frame-setup MOV64rr %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_register %rbp
+    CFI_INSTRUCTION def_cfa_register %rbp
   ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl),
     PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl), implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
     %rbp = POP64r implicit-def %rsp, implicit %rsp
diff --git a/test/CodeGen/MIR/X86/memory-operands.mir b/test/CodeGen/MIR/X86/memory-operands.mir
index a25538d9b1f..5ac932e9034 100644
--- a/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/test/CodeGen/MIR/X86/memory-operands.mir
@@ -354,7 +354,7 @@ fixedStack:
 body: |
   bb.0.entry:
     %rsp = frame-setup SUB64ri8 %rsp, 24, implicit-def dead %eflags
-    CFI_INSTRUCTION .cfi_def_cfa_offset 32
+    CFI_INSTRUCTION def_cfa_offset 32
     LD_F80m %rsp, 1, _, 32, _, implicit-def dead %fpsw
   ; CHECK: name: stack_psv
   ; CHECK: ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16)
diff --git a/test/CodeGen/X86/patchpoint-verifiable.mir b/test/CodeGen/X86/patchpoint-verifiable.mir
index c108473a182..119deff7f61 100644
--- a/test/CodeGen/X86/patchpoint-verifiable.mir
+++ b/test/CodeGen/X86/patchpoint-verifiable.mir
@@ -31,10 +31,10 @@ body: |
     liveins: %rdi, %rsi, %rbp
 
     frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    CFI_INSTRUCTION .cfi_offset %rbp, -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    CFI_INSTRUCTION offset %rbp, -16
     %rbp = frame-setup MOV64rr %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_register %rbp
+    CFI_INSTRUCTION def_cfa_register %rbp
   ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
     PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
     %rbp = POP64r implicit-def %rsp, implicit %rsp
diff --git a/test/DebugInfo/MIR/X86/live-debug-values.mir b/test/DebugInfo/MIR/X86/live-debug-values.mir
index 7709bb0e7de..3762d9bdece 100644
--- a/test/DebugInfo/MIR/X86/live-debug-values.mir
+++ b/test/DebugInfo/MIR/X86/live-debug-values.mir
@@ -193,8 +193,8 @@ body:             |
     liveins: %edi, %rsi, %rbx
   
     frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
-    CFI_INSTRUCTION .cfi_def_cfa_offset 16
-    CFI_INSTRUCTION .cfi_offset %rbx, -16
+    CFI_INSTRUCTION def_cfa_offset 16
+    CFI_INSTRUCTION offset %rbx, -16
     DBG_VALUE debug-use %edi, debug-use _, !12, !20, debug-location !21
     DBG_VALUE debug-use %rsi, debug-use _, !13, !20, debug-location !22
     %eax = MOV32rr %edi