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Add some AVX convert instructions

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llvm-svn: 106815
This commit is contained in:
Bruno Cardoso Lopes 2010-06-25 00:39:30 +00:00
parent 7e15f420d0
commit bde2881855
3 changed files with 80 additions and 0 deletions
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24
lib/Target/X86/X86InstrSSE.td
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@ -613,12 +613,36 @@ multiclass sse12_cvt<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
[(set DstRC:$dst, (OpNode (ld_frag addr:$src)))]>;
}
multiclass sse12_cvt_avx<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
SDNode OpNode, X86MemOperand x86memop, PatFrag ld_frag,
string asm> {
def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src),
asm, []>;
def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst),
(ins DstRC:$src1, x86memop:$src), asm, []>;
}
// Conversion instructions
let isAsmParserOnly = 1 in {
defm VCVTTSS2SI : sse12_cvt<0x2C, FR32, GR32, fp_to_sint, f32mem, loadf32,
"cvttss2si\t{$src, $dst|$dst, $src}">, XS, VEX;
defm VCVTTSD2SI : sse12_cvt<0x2C, FR64, GR32, fp_to_sint, f64mem, loadf64,
"cvttsd2si\t{$src, $dst|$dst, $src}">, XD, VEX;
}
defm CVTTSS2SI : sse12_cvt<0x2C, FR32, GR32, fp_to_sint, f32mem, loadf32,
"cvttss2si\t{$src, $dst|$dst, $src}">, XS;
defm CVTTSD2SI : sse12_cvt<0x2C, FR64, GR32, fp_to_sint, f64mem, loadf64,
"cvttsd2si\t{$src, $dst|$dst, $src}">, XD;
let isAsmParserOnly = 1 in {
defm VCVTSI2SS : sse12_cvt_avx<0x2A, GR32, FR32, sint_to_fp, i32mem, loadi32,
"cvtsi2ss\t{$src, $src1, $dst|$dst, $src1, $src}">, XS,
VEX_4V;
defm VCVTSI2SD : sse12_cvt_avx<0x2A, GR32, FR64, sint_to_fp, i32mem, loadi32,
"cvtsi2sd\t{$src, $src1, $dst|$dst, $src1, $src}">, XD,
VEX_4V;
}
defm CVTSI2SS : sse12_cvt<0x2A, GR32, FR32, sint_to_fp, i32mem, loadi32,
"cvtsi2ss\t{$src, $dst|$dst, $src}">, XS;
defm CVTSI2SD : sse12_cvt<0x2A, GR32, FR64, sint_to_fp, i32mem, loadi32,

32
test/MC/AsmParser/X86/x86_32-encoding.s
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@ -10686,3 +10686,35 @@
// CHECK: encoding: [0xc5,0xf9,0x2f,0x10]
vcomisd (%eax), %xmm2
// CHECK: vcvttss2si %xmm1, %eax
// CHECK: encoding: [0xc5,0xfa,0x2c,0xc1]
vcvttss2si %xmm1, %eax
// CHECK: vcvttss2si (%ecx), %eax
// CHECK: encoding: [0xc5,0xfa,0x2c,0x01]
vcvttss2si (%ecx), %eax
// CHECK: vcvtsi2ss (%eax), %xmm1, %xmm2
// CHECK: encoding: [0xc5,0xf2,0x2a,0x10]
vcvtsi2ss (%eax), %xmm1, %xmm2
// CHECK: vcvtsi2ss (%eax), %xmm1, %xmm2
// CHECK: encoding: [0xc5,0xf2,0x2a,0x10]
vcvtsi2ss (%eax), %xmm1, %xmm2
// CHECK: vcvttsd2si %xmm1, %eax
// CHECK: encoding: [0xc5,0xfb,0x2c,0xc1]
vcvttsd2si %xmm1, %eax
// CHECK: vcvttsd2si (%ecx), %eax
// CHECK: encoding: [0xc5,0xfb,0x2c,0x01]
vcvttsd2si (%ecx), %eax
// CHECK: vcvtsi2sd (%eax), %xmm1, %xmm2
// CHECK: encoding: [0xc5,0xf3,0x2a,0x10]
vcvtsi2sd (%eax), %xmm1, %xmm2
// CHECK: vcvtsi2sd (%eax), %xmm1, %xmm2
// CHECK: encoding: [0xc5,0xf3,0x2a,0x10]
vcvtsi2sd (%eax), %xmm1, %xmm2

24
test/MC/AsmParser/X86/x86_64-encoding.s
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@ -742,4 +742,28 @@ pshufb CPI1_0(%rip), %xmm1
// CHECK: encoding: [0xc5,0x79,0x2f,0x20]
vcomisd (%rax), %xmm12
// CHECK: vcvttss2si (%rcx), %eax
// CHECK: encoding: [0xc5,0xfa,0x2c,0x01]
vcvttss2si (%rcx), %eax
// CHECK: vcvtsi2ss (%rax), %xmm11, %xmm12
// CHECK: encoding: [0xc5,0x22,0x2a,0x20]
vcvtsi2ss (%rax), %xmm11, %xmm12
// CHECK: vcvtsi2ss (%rax), %xmm11, %xmm12
// CHECK: encoding: [0xc5,0x22,0x2a,0x20]
vcvtsi2ss (%rax), %xmm11, %xmm12
// CHECK: vcvttsd2si (%rcx), %eax
// CHECK: encoding: [0xc5,0xfb,0x2c,0x01]
vcvttsd2si (%rcx), %eax
// CHECK: vcvtsi2sd (%rax), %xmm11, %xmm12
// CHECK: encoding: [0xc5,0x23,0x2a,0x20]
vcvtsi2sd (%rax), %xmm11, %xmm12
// CHECK: vcvtsi2sd (%rax), %xmm11, %xmm12
// CHECK: encoding: [0xc5,0x23,0x2a,0x20]
vcvtsi2sd (%rax), %xmm11, %xmm12