From be221c60139413b29dc0f429033ead58aa189f9f Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Wed, 30 Oct 2002 01:48:41 +0000
Subject: [PATCH] Allow BuildMI that helps automate construction of SSA
 information

llvm-svn: 4443
---
 include/llvm/CodeGen/MachineInstr.h        |  5 +++--
 include/llvm/CodeGen/MachineInstrBuilder.h | 22 +++++++++++++++++++---
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 6b6b3255e38..a157e9d39be 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -372,10 +372,11 @@ public:
 
   /// addRegOperand - Add a symbolic virtual register reference...
   ///
-  void addRegOperand(int reg) {
+  void addRegOperand(int reg, bool isDef = false) {
     assert(!OperandsComplete() &&
            "Trying to add an operand to a machine instr that is already done!");
-    operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister));
+    operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister,
+                                      isDef));
   }
 
   /// addPCDispOperand - Add a PC relative displacement operand to the MI
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index 909d101e90f..d594d1b025b 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -29,8 +29,8 @@ struct MachineInstrBuilder {
 
   /// addReg - Add a new virtual register operand...
   ///
-  MachineInstrBuilder &addReg(int RegNo) {
-    MI->addRegOperand(RegNo);
+  MachineInstrBuilder &addReg(int RegNo, bool isDef = false) {
+    MI->addRegOperand(RegNo, isDef);
     return *this;
   }
 
@@ -72,15 +72,31 @@ struct MachineInstrBuilder {
 };
 
 /// BuildMI - Builder interface.  Specify how to create the initial instruction
-/// itself.
+/// itself.  NumOperands is the number of operands to the machine instruction to
+/// allow for memory efficient representation of machine instructions.
 ///
 inline MachineInstrBuilder BuildMI(MachineOpCode Opcode, unsigned NumOperands) {
   return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
 }
 
+/// BuildMI - This version of the builder inserts the built MachineInstr into
+/// the specified MachineBasicBlock.
+///
 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
                                    unsigned NumOperands) {
   return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands));
 }
 
+/// BuildMI - This version of the builder inserts the built MachineInstr into
+/// the specified MachineBasicBlock, and also sets up the first "operand" as a
+/// destination virtual register.  NumOperands is the number of additional add*
+/// calls that are expected, it does not include the destination register.
+///
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
+                                   unsigned NumOperands, unsigned DestReg) {
+  return MachineInstrBuilder(new MachineInstr(BB, Opcode,
+                                              NumOperands+1)).addReg(DestReg,
+                                                                     true);
+}
+
 #endif