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Put out* into the allocation order, allowing the register allocator to
coallesce moves into outgoing args. llvm-svn: 21249
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@ -249,14 +249,13 @@ def GR : RegisterClass<i64, 64,
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r104, r105, r106, r107, r108, r109, r110, r111,
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r112, r113, r114, r115, r116, r117, r118, r119,
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r120, r121, r122, r123, r124, r125, r126, r127,
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r0, r1, r2, r12, r13, r15, r22,
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out0, out1, out2, out3,
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out4, out5, out6, out7]> // these last 15 are special (look down)
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out4, out5, out6, out7,
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r0, r1, r2, r12, r13, r15, r22]> // these last 7 are special (look down)
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{
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let Methods = [{
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iterator allocation_order_end(MachineFunction &MF) const {
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int numReservedRegs=15; // the 15 special registers r0,r1,r2,r12,r13 etc
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int numReservedRegs=7; // the 15 special registers r0,r1,r2,r12,r13 etc
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// we also can't allocate registers for use as locals if they're
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// already required as 'out' registers
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numReservedRegs+=MF.getInfo<IA64FunctionInfo>()->outRegsUsed;
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