mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 12:12:47 +01:00
[ARM][SchedModels] Convert IsLdstsoMinusRegPred to MCSchedPredicate
Differential revision: https://reviews.llvm.org/D90029
This commit is contained in:
parent
80a867a3d9
commit
be3fc14b59
@ -634,13 +634,6 @@ bool ARMBaseInstrInfo::isLdstScaledRegNotPlusLsl2(const MachineInstr &MI,
|
||||
return !SimpleScaled;
|
||||
}
|
||||
|
||||
// Minus reg for ldstso addr mode
|
||||
bool ARMBaseInstrInfo::isLdstSoMinusReg(const MachineInstr &MI,
|
||||
unsigned Op) const {
|
||||
unsigned OffImm = MI.getOperand(Op + 2).getImm();
|
||||
return ARM_AM::getAM2Op(OffImm) == ARM_AM::sub;
|
||||
}
|
||||
|
||||
// Load, scaled register offset
|
||||
bool ARMBaseInstrInfo::isAm2ScaledReg(const MachineInstr &MI,
|
||||
unsigned Op) const {
|
||||
|
@ -181,8 +181,6 @@ public:
|
||||
|
||||
// Load, scaled register offset, not plus LSL2
|
||||
bool isLdstScaledRegNotPlusLsl2(const MachineInstr &MI, unsigned Op) const;
|
||||
// Minus reg for ldstso addr mode
|
||||
bool isLdstSoMinusReg(const MachineInstr &MI, unsigned Op) const;
|
||||
// Scaled register offset in address mode 2
|
||||
bool isAm2ScaledReg(const MachineInstr &MI, unsigned Op) const;
|
||||
|
||||
|
@ -168,6 +168,10 @@ let FunctionMapper = "ARM_AM::getAM2ShiftOpc" in {
|
||||
def CheckExtNoShift : CheckImmOperand_s<4, "ARM_AM::no_shift">;
|
||||
}
|
||||
|
||||
let FunctionMapper = "ARM_AM::getAM2Op" in {
|
||||
class CheckAM2OpSub<int n> : CheckImmOperand_s<n, "ARM_AM::sub"> {}
|
||||
}
|
||||
|
||||
def IsLDMBaseRegInList : CheckFunctionPredicate<
|
||||
"ARM_MC::isLDMBaseRegInList", "ARM_MC::isLDMBaseRegInList"
|
||||
>;
|
||||
|
@ -51,12 +51,9 @@ def IsLdstsoScaledNotOptimalPredX2 :
|
||||
|
||||
def IsLdstsoScaledPredX2 : MCSchedPredicate<CheckNot<CheckExtNoShift>>;
|
||||
|
||||
def IsLdstsoMinusRegPredX0 :
|
||||
SchedPredicate<[{TII->isLdstSoMinusReg(*MI, 0)}]>;
|
||||
def IsLdstsoMinusRegPred :
|
||||
SchedPredicate<[{TII->isLdstSoMinusReg(*MI, 1)}]>;
|
||||
def IsLdstsoMinusRegPredX2 :
|
||||
SchedPredicate<[{TII->isLdstSoMinusReg(*MI, 2)}]>;
|
||||
def IsLdstsoMinusRegPredX0 : MCSchedPredicate<CheckAM2OpSub<2>>;
|
||||
def IsLdstsoMinusRegPred : MCSchedPredicate<CheckAM2OpSub<3>>;
|
||||
def IsLdstsoMinusRegPredX2 : MCSchedPredicate<CheckAM2OpSub<4>>;
|
||||
|
||||
// Load, scaled register offset
|
||||
def IsLdrAm2ScaledPred :
|
||||
|
@ -175,13 +175,13 @@
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r1, [r2], #30
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r3, [r1], #-30
|
||||
# CHECK-NEXT: 1 4 1.00 * ldr r3, [r8, r1]
|
||||
# CHECK-NEXT: 1 4 1.00 * ldr r2, [r5, -r3]
|
||||
# CHECK-NEXT: 2 5 1.00 * ldr r2, [r5, -r3]
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r1, [r5, r9]!
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r6, [r7, -r8]!
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r1, [r0, r2, lsr #3]!
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r5, [r9], r2
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r4, [r3], -r6
|
||||
# CHECK-NEXT: 1 4 1.00 * ldr r3, [r8, -r2, lsl #15]
|
||||
# CHECK-NEXT: 2 5 1.00 * ldr r3, [r8, -r2, lsl #15]
|
||||
# CHECK-NEXT: 2 4 1.00 * ldr r1, [r5], r3, asr #15
|
||||
# CHECK-NEXT: 1 4 1.00 * ldrb r3, [r8]
|
||||
# CHECK-NEXT: 1 4 1.00 * ldrb r1, [sp, #63]
|
||||
@ -189,12 +189,12 @@
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r8, [r1], #22
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r2, [r7], #-19
|
||||
# CHECK-NEXT: 1 4 1.00 * ldrb r9, [r8, r5]
|
||||
# CHECK-NEXT: 1 4 1.00 * ldrb r1, [r5, -r1]
|
||||
# CHECK-NEXT: 2 5 1.00 * ldrb r1, [r5, -r1]
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r3, [r5, r2]!
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r6, [r9, -r3]!
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r2, [r1], r4
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r8, [r4], -r5
|
||||
# CHECK-NEXT: 1 4 1.00 * ldrb r7, [r12, -r1, lsl #15]
|
||||
# CHECK-NEXT: 2 5 1.00 * ldrb r7, [r12, -r1, lsl #15]
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrb r5, [r2], r9, asr #15
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrbt r3, [r1], #4
|
||||
# CHECK-NEXT: 2 4 1.00 * ldrbt r2, [r8], #-8
|
||||
@ -271,13 +271,13 @@
|
||||
# CHECK-NEXT: 2 1 1.00 * str r9, [sp], #4095
|
||||
# CHECK-NEXT: 2 1 1.00 * str r1, [r7], #-128
|
||||
# CHECK-NEXT: 1 1 1.00 * str r9, [r6, r3]
|
||||
# CHECK-NEXT: 1 1 1.00 * str r8, [r0, -r2]
|
||||
# CHECK-NEXT: 2 3 1.00 * str r8, [r0, -r2]
|
||||
# CHECK-NEXT: 2 1 1.00 * str r7, [r1, r6]!
|
||||
# CHECK-NEXT: 2 2 1.00 * str r7, [r1, r6, lsl #2]!
|
||||
# CHECK-NEXT: 2 1 1.00 * str r6, [sp, -r1]!
|
||||
# CHECK-NEXT: 2 3 1.00 * str r6, [sp, -r1]!
|
||||
# CHECK-NEXT: 2 2 1.00 * str r5, [r3], r9
|
||||
# CHECK-NEXT: 2 2 1.00 * str r4, [r2], -r5
|
||||
# CHECK-NEXT: 1 1 1.00 * str r3, [r4, -r2, lsl #2]
|
||||
# CHECK-NEXT: 2 3 1.00 * str r3, [r4, -r2, lsl #2]
|
||||
# CHECK-NEXT: 2 2 1.00 * str r2, [r7], r3, asr #24
|
||||
# CHECK-NEXT: 1 1 1.00 * strb r9, [r2]
|
||||
# CHECK-NEXT: 1 1 1.00 * strb r7, [r1, #3]
|
||||
@ -285,12 +285,12 @@
|
||||
# CHECK-NEXT: 2 1 1.00 * strb r5, [r7], #72
|
||||
# CHECK-NEXT: 2 1 1.00 * strb r1, [sp], #-1
|
||||
# CHECK-NEXT: 1 1 1.00 * strb r1, [r2, r9]
|
||||
# CHECK-NEXT: 1 1 1.00 * strb r2, [r3, -r8]
|
||||
# CHECK-NEXT: 2 3 1.00 * strb r2, [r3, -r8]
|
||||
# CHECK-NEXT: 2 1 1.00 * strb r3, [r4, r7]!
|
||||
# CHECK-NEXT: 2 1 1.00 * strb r4, [r5, -r6]!
|
||||
# CHECK-NEXT: 2 3 1.00 * strb r4, [r5, -r6]!
|
||||
# CHECK-NEXT: 2 2 1.00 * strb r5, [r6], r5
|
||||
# CHECK-NEXT: 2 2 1.00 * strb r6, [r2], -r4
|
||||
# CHECK-NEXT: 1 1 1.00 * strb r7, [r12, -r3, lsl #5]
|
||||
# CHECK-NEXT: 2 3 1.00 * strb r7, [r12, -r3, lsl #5]
|
||||
# CHECK-NEXT: 2 2 1.00 * strb sp, [r7], r2, asr #12
|
||||
# CHECK-NEXT: 2 1 1.00 U strbt r6, [r2], #12
|
||||
# CHECK-NEXT: 2 1 1.00 U strbt r5, [r6], #-13
|
||||
@ -335,7 +335,7 @@
|
||||
|
||||
# CHECK: Resource pressure per iteration:
|
||||
# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6]
|
||||
# CHECK-NEXT: - 65.00 65.00 167.00 9.00 57.00 - -
|
||||
# CHECK-NEXT: - 69.00 69.00 167.00 9.00 57.00 - -
|
||||
|
||||
# CHECK: Resource pressure by instruction:
|
||||
# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6] Instructions:
|
||||
@ -347,13 +347,13 @@
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r2], #30
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r3, [r1], #-30
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldr r3, [r8, r1]
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldr r2, [r5, -r3]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r2, [r5, -r3]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r5, r9]!
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r6, [r7, -r8]!
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r0, r2, lsr #3]!
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r5, [r9], r2
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r4, [r3], -r6
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldr r3, [r8, -r2, lsl #15]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r3, [r8, -r2, lsl #15]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldr r1, [r5], r3, asr #15
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldrb r3, [r8]
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldrb r1, [sp, #63]
|
||||
@ -361,12 +361,12 @@
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r8, [r1], #22
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r2, [r7], #-19
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldrb r9, [r8, r5]
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldrb r1, [r5, -r1]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r1, [r5, -r1]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r3, [r5, r2]!
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r6, [r9, -r3]!
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r2, [r1], r4
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r8, [r4], -r5
|
||||
# CHECK-NEXT: - - - 1.00 - - - - ldrb r7, [r12, -r1, lsl #15]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r7, [r12, -r1, lsl #15]
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrb r5, [r2], r9, asr #15
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrbt r3, [r1], #4
|
||||
# CHECK-NEXT: - 0.50 0.50 1.00 - - - - ldrbt r2, [r8], #-8
|
||||
@ -443,13 +443,13 @@
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r9, [sp], #4095
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r1, [r7], #-128
|
||||
# CHECK-NEXT: - - - - - 1.00 - - str r9, [r6, r3]
|
||||
# CHECK-NEXT: - - - - - 1.00 - - str r8, [r0, -r2]
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r8, [r0, -r2]
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r7, [r1, r6]!
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - str r7, [r1, r6, lsl #2]!
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r6, [sp, -r1]!
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - str r5, [r3], r9
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - str r4, [r2], -r5
|
||||
# CHECK-NEXT: - - - - - 1.00 - - str r3, [r4, -r2, lsl #2]
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - str r3, [r4, -r2, lsl #2]
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - str r2, [r7], r3, asr #24
|
||||
# CHECK-NEXT: - - - - - 1.00 - - strb r9, [r2]
|
||||
# CHECK-NEXT: - - - - - 1.00 - - strb r7, [r1, #3]
|
||||
@ -457,12 +457,12 @@
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r5, [r7], #72
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r1, [sp], #-1
|
||||
# CHECK-NEXT: - - - - - 1.00 - - strb r1, [r2, r9]
|
||||
# CHECK-NEXT: - - - - - 1.00 - - strb r2, [r3, -r8]
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r2, [r3, -r8]
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r3, [r4, r7]!
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r4, [r5, -r6]!
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - strb r5, [r6], r5
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - strb r6, [r2], -r4
|
||||
# CHECK-NEXT: - - - - - 1.00 - - strb r7, [r12, -r3, lsl #5]
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strb r7, [r12, -r3, lsl #5]
|
||||
# CHECK-NEXT: - - - - 1.00 1.00 - - strb sp, [r7], r2, asr #12
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strbt r6, [r2], #12
|
||||
# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - strbt r5, [r6], #-13
|
||||
|
Loading…
Reference in New Issue
Block a user