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Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are.

llvm-svn: 25324
This commit is contained in:
Chris Lattner 2006-01-14 22:27:21 +00:00
parent 551df64bd0
commit be7efab5dc
2 changed files with 11 additions and 14 deletions

View File

@ -94,6 +94,15 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
addLegalFPImmediate(+1.0);
}
const char *IA64TargetLowering::getTargetNodeName(unsigned Opcode) const {
switch (Opcode) {
default: return 0;
case IA64ISD::GETFD: return "IA64ISD::GETFD";
case IA64ISD::BRCALL: return "IA64ISD::BRCALL";
}
}
/// isFloatingPointZero - Return true if this is 0.0 or -0.0.
static bool isFloatingPointZero(SDOperand Op) {
if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))

View File

@ -25,20 +25,6 @@ namespace llvm {
// Start the numbering where the builting ops and target ops leave off.
FIRST_NUMBER = ISD::BUILTIN_OP_END+IA64::INSTRUCTION_LIST_END,
/// FSEL - Traditional three-operand fsel node.
///
FSEL,
/// FCFID - The FCFID instruction, taking an f64 operand and producing
/// and f64 value containing the FP representation of the integer that
/// was temporarily in the f64 operand.
FCFID,
/// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64
/// operand, producing an f64 value containing the integer representation
/// of that FP value.
FCTIDZ, FCTIWZ,
/// GETFD - the getf.d instruction takes a floating point operand and
/// returns its 64-bit memory representation as an i64
GETFD,
@ -63,6 +49,8 @@ namespace llvm {
///
// XXX virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
const char *getTargetNodeName(unsigned Opcode) const;
/// LowerArguments - This hook must be implemented to indicate how we should
/// lower the arguments for the specified function, into the specified DAG.
virtual std::vector<SDOperand>